Intel 80C196NU User Manual
8XC196NP, 80C196NU USER’S MANUAL
A-60
Table A-9 lists instructions alphabetically within groups, along with their execution times, ex-
pressed in state times.
pressed in state times.
Table A-9. Instruction Execution Times (in State Times)
Arithmetic (Group I)
Mnemonic
Direct
Immed.
Indirect
Indexed
Normal
Autoinc.
Short
Long
Reg.
Mem.
Reg.
Mem.
Reg.
Mem.
Reg.
Mem.
ADD (2 ops)
4
5
6
8
7
9
6
8
7
9
ADD (3 ops)
5
6
7
10
8
11
7
10
8
11
ADDB (2 ops)
4
4
6
8
7
9
6
8
7
9
ADDB (3 ops)
5
5
7
10
8
11
7
10
8
11
ADDC
4
5
6
8
7
9
6
8
7
9
ADDCB
4
4
6
8
7
9
6
8
7
9
CLR
3
—
—
—
—
—
—
—
—
—
CLRB
3
—
—
—
—
—
—
—
—
—
CMP
4
5
6
8
7
9
6
8
7
9
CMPB
4
4
6
8
7
9
6
8
7
9
CMPL
7
—
—
—
—
—
—
—
—
—
DEC
3
—
—
—
—
—
—
—
—
—
DECB
3
—
—
—
—
—
—
—
—
—
EXT
4
—
—
—
—
—
—
—
—
—
EXTB
4
—
—
—
—
—
—
—
—
—
INC
3
—
—
—
—
—
—
—
—
—
INCB
3
—
—
—
—
—
—
—
—
—
SUB (2 ops)
4
5
6
8
7
9
6
8
7
9
SUB (3 ops)
5
6
7
10
8
11
7
10
8
11
SUBB (2 ops)
4
4
6
8
7
9
6
8
7
9
SUBB (3 ops)
5
5
7
10
8
11
7
10
8
11
SUBC
4
5
6
8
7
9
6
8
7
9
SUBCB
4
4
6
8
7
9
6
8
7
9
NOTE:
The column entitled “Reg.” lists the instruction execution times for accesses to the register file or
peripheral SFRs. The column entitled “Mem.” lists the instruction execution times for accesses to
all memory-mapped registers, I/O, or memory. See Table 5-1 on page 5-4 for address information.
peripheral SFRs. The column entitled “Mem.” lists the instruction execution times for accesses to
all memory-mapped registers, I/O, or memory. See Table 5-1 on page 5-4 for address information.