AMD K User Manuals

Table of Contents

• AMD Athlon™ Processor Model 4  Revision Guide

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  • Revision Guide Policy

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• 1 Product Errata

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  • Table 1. CrossReference of Product Revision to Errata

    5
  • Table 2. CPUID Values for the Revisions of the AMD Athlon™ Processor Model 4

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  • 5 MCA Bus Unit Control Register MSR 408H Returns Incorrect Information

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  • 10 Resistance Value of the ZN and ZP Pins

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  • 11 PLL Overshoot on Wake-Up from Disconnect Causes Auto-Compensation Circuit to Fail

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  • 13 Instruction Execution Deadlock

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  • 14 Processors with Half-Frequency Multipliers May Hang Upon Wake-up from Disconnect

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  • 15 Processor Does Not Support Reliable Microcode Patch Mechanism

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  • 16 INVLPG Instruction Does Not Flush Entire Four-Megabyte Page Properly with Certain Linear Addre...

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  • 17 Code Modifications that Coincide with Level 2 Instruction TLB Translations May Escape Detectio...

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  • 20 A Speculative SMC Store Followed by an Actual SMC Store May Cause One-Time Stale Execution

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  • 21 Real Mode RDPMC with Illegal ECX May Cause Unpredictable Operation

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  • 22 Using Task Gates With Breakpoints Enabled May Cause Unexpected Faults

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  • 23 Single Step Across I/O SMI Skips One Debug Trap

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  • 24 Software Prefetches May Report A Page Fault

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  • 2 Revision Determination

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• 3 Technical and Documentation Support

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