National Instruments ni 6115-6120 User Manuals

Table of Contents

• NI6115/6120 User Manual

  1
• Support

  2
  • Worldwide Technical Support and Product Information

    2
  • National Instruments Corporate Headquarters

    2
  • Worldwide Offices

    2
• Important Information

  3
  • Warranty

    3
  • Copyright

    3
  • Trademarks

    3
  • Patents

    3
  • WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS

    3
• Compliance

  4
• Contents

  6
• About This Manual

  9
  • Conventions

    9
  • National Instruments Documentation

    10
  • Related Documentation

    11
• Chapter 1 Introduction

  12
  • About the NI 6115/6120

    12
  • Using PXI with CompactPCI

    13
    • Table 1-1. NI PXI-6115/6120 J2 Pin Assignment

      14
  • What You Need to Get Started

    14
  • Software Programming Choices

    15
    • NI-DAQ

      15
      • Figure 1-1. The Relationship Among the Programming Environment, NI-DAQ, and the Hardware

        16
    • National Instruments ADE Software

      16
  • Optional Equipment

    17
  • Custom Cabling

    17
  • Unpacking

    18
  • Safety Information

    19
• Chapter 2 Installing and Configuring the NI 6115/6120

  21
  • Installing the Software

    21
  • Installing the Hardware

    21
  • Configuring the Device

    23
• Chapter 3 Hardware Overview

  24
  • Figure 3-1. NI 6115 Block Diagram

    24
  • Figure 3-2. NI 6120 Block Diagram

    25
  • Analog Input

    25
    • Input Mode

      25
    • Input Polarity and Input Range

      26
      • Table 3-1. Input Range and Measurement Precision

        27
      • Considerations for Selecting Input Ranges

        27
    • Input Coupling

      27
  • Analog Output

    28
  • Analog Trigger

    28
    • Figure 3-3. Analog Trigger Block Diagram for the NI 6115/6120

      29
    • Figure 3-4. Below-Low-Level Analog Triggering Mode

      29
    • Figure 3-5. Above-High-Level Analog Triggering Mode

      30
    • Figure 3-6. Inside-Region Analog Triggering Mode

      30
    • Figure 3-7. High-Hysteresis Analog Triggering Mode

      30
    • Figure 3-8. Low-Hysteresis Analog Triggering Mode

      31
  • Antialiasing Filters

    31
    • Figure 3-9. Effects of Hardware and Software Filtering on Antialiasing

      32
  • Phase-Locked Loop Circuit

    32
    • Figure 3-10. PLL Block Diagram

      33
  • Correlated Digital I/O

    33
  • Timing Signal Routing

    33
    • Figure 3-11. STARTSCAN Signal Routing

      34
    • Programmable Function Inputs

      35
    • Device and RTSI Clocks

      35
    • RTSI Triggers

      35
      • Figure 3-12. PCI RTSI Bus Signal Connection

        36
      • Figure 3-13. PXI RTSI Bus Signal Connections

        37
• Chapter 4 Connecting Signals

  38
  • Table 4-1. I/O Connector Details

    38
  • I/O Connector

    38
    • Figure 4-1. I/O Connector Pin Assignment for the NI 6115/6120

      39
    • I/O Connector Signal Descriptions

      40
      • Table 4-2. Signal Descriptions for I/O Connector Pins

        40
      • Table 4-3. Analog I/O Signal Summary for the NI 6115

        42
      • Table 4-4. Analog I/O Summary for the NI 6120

        43
      • Table 4-5. Digital I/O Signal Summary

        43
  • Types of Signal Sources

    44
    • Floating Signal Sources

      44
    • Ground-Referenced Signal Sources

      45
  • Connecting Analog Input Signals

    45
    • Connections for Ground-Referenced Signal Sources

      46
      • Figure 4-2. Pseudodifferential Input Connections on the NI 6115 for Ground-Referenced Signals

        46
      • Figure 4-3. Pseudodifferential Input Connections on the NI 6120 for Ground-Referenced Signals

        47
    • Connections for Nonreferenced or Floating Signal Sources

      48
      • Figure 4-4. Differential Input Connections on the NI 6115 for Nonreferenced Signals

        48
      • Figure 4-5. Differential Input Connections on the NI 6120 for Nonreferenced Signals

        49
    • Common-Mode Signal Rejection Considerations

      49
  • Working Voltage Range

    50
  • Connecting Analog Output Signals

    51
    • Figure 4-6. Analog Output Connections

      51
  • Connecting Digital I/O Signals

    52
    • Figure 4-7. Digital I/O Connections

      52
  • Correlating DIO Signal Connections

    53
    • Figure 4-8. Clock Signal Driving DI and DO Signals

      54
    • Figure 4-9. Rising-Edge AO Update Signal Driving a DIO Signal

      54
    • Figure 4-10. Falling-Edge RTSI Clock Signal Driving a DIO Signal

      55
  • Power Connections

    55
  • Connecting Timing Signals

    55
    • Figure 4-11. Timing I/O Connections

      56
    • Programmable Function Input Connections

      57
    • DAQ Timing Connections

      57
      • Figure 4-12. Typical Posttriggered Acquisition

        58
      • Figure 4-13. Typical Pretriggered Acquisition

        58
      • TRIG1 Signal

        58
        • Figure 4-14. TRIG1 Input Signal Timing

          59
        • Figure 4-15. TRIG1 Output Signal Timing

          59
      • TRIG2 Signal

        59
        • Figure 4-16. TRIG2 Input Signal Timing

          60
        • Figure 4-17. TRIG2 Output Signal Timing

          60
      • STARTSCAN Signal

        61
        • Figure 4-18. STARTSCAN Input Signal Timing

          61
        • Figure 4-19. STARTSCAN Output Signal Timing

          62
      • CONVERT* Signal

        63
        • Figure 4-20. CONVERT* Input Signal Timing

          63
        • Figure 4-21. CONVERT* Output Signal Timing

          63
      • AIGATE Signal

        64
      • SISOURCE Signal

        64
        • Figure 4-22. SISOURCE Signal Timing

          65
      • SCANCLK Signal

        65
        • Figure 4-23. SCANCLK Signal Timing

          65
      • EXTSTROBE* Signal

        66
        • Figure 4-24. EXTSTROBE* Signal Timing

          66
    • Waveform Generation Timing Connections

      66
      • WFTRIG Signal

        66
        • Figure 4-25. WFTRIG Input Signal Timing

          67
        • Figure 4-26. WFTRIG Output Signal Timing

          67
      • UPDATE* Signal

        67
        • Figure 4-27. UPDATE* Input Signal Timing

          68
        • Figure 4-28. UPDATE* Output Signal Timing

          68
      • UISOURCE Signal

        68
        • Figure 4-29. UISOURCE Signal Timing

          69
    • General-Purpose Timing Signal Connections

      69
      • GPCTR0_SOURCE Signal

        69
        • Figure 4-30. GPCTR0_SOURCE Signal Timing

          70
      • GPCTR0_GATE Signal

        70
        • Figure 4-31. GPCTR0_GATE Signal Timing in Edge-Detection Mode

          71
      • GPCTR0_OUT Signal

        71
        • Figure 4-32. GPCTR0_OUT Signal Timing

          71
      • GPCTR0_UP_DOWN Signal

        72
      • GPCTR1_SOURCE Signal

        72
        • Figure 4-33. GPCTR1_SOURCE Signal Timing

          72
      • GPCTR1_GATE Signal

        73
        • Figure 4-34. GPCTR1_GATE Signal Timing in Edge-Detection Mode

          73
      • GPCTR1_OUT Signal

        73
        • Figure 4-35. GPCTR1_OUT Signal Timing

          74
      • GPCTR1_UP_DOWN Signal

        74
        • Figure 4-36. GPCTR Timing Summary

          74
      • FREQ_OUT Signal

        75
  • Field Wiring Considerations

    76
• Chapter 5 Calibration

  77
  • Loading Stored Calibration Constants

    77
  • Self-Calibration

    78
  • External Calibration

    78
• Appendix A Specifications

  80
  • Table A-1. NI 6115 Analog Input DC Accuracy Information

    82
  • Table A-2. NI 6120 Analog Input DC Accuracy Information

    82
  • Table A-3. NI 6115 Analog Input Dynamic Characteristics

    84
  • Table A-4. NI 6120 Analog Input Dynamic Characteristics

    84
  • Figure A-1. NI 6115 Total Harmonic Distortion Plus Noise (THD + N)

    85
  • Figure A-2. NI 6120 Total Harmonic Distortion Plus Noise (THD + N)

    86
  • Figure A-3. NI 6115 High-Voltage THD + N

    87
  • Figure A-4. NI 6120 High-Voltage THD + N

    88
  • Figure A-5. NI 6115 THD + N with Filters

    89
  • Figure A-6. NI 6120 THD + N with Filters

    90
  • Table A-5. NI 6115 Analog Output DC Accuracy Information

    92
  • Table A-6. NI 6120 Analog Output DC Accuracy Information

    92
  • Table A-7. Digital logic levels

    94
• Appendix B Common Questions

  98
  • Figure B-1. Setting Filter Values in LabVIEW

    100
  • Table B-1. Signal Name Equivalencies

    102
• Appendix C Technical Support and Professional Services

  104
• Glossary

  106
  • Numbers/Symbols

    106
  • A-B

    107
  • C-D

    108
  • E

    109
  • F-G

    110
  • H-K

    111
  • L-M

    112
  • N-P

    113
  • R

    114
  • S

    115
  • T-U

    116
  • V-W

    117
• Index

  118
  • Numerics

    118
  • A

    118
  • B-C

    119
  • D-E

    120
  • F-G

    121
  • H-M

    122
  • N-P

    123
  • Q-S

    124
  • T

    126
  • U-W

    127