User Manual (SP001GBLRU800S02)Table of ContentsRevision History2Table of contents21. Description3The SP001GBLRU800S02 is a 128M x 8bits Double Data Rate SDRAM high-density for DDR2-800. The SP001GBLRU800S02 consists of 8pcs CMOS 128Mx8 bits Double Data Rate SDRAMs in 60 ball FBGA packages, and a 2048 bits serial EEPROM on a 240-pin printed circuit board. The SP001GBLRU800S02 is a Dual In-Line Memory Module and is intended for mounting into 240-pin edge connector sockets. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges of DQS. Range of operation frequencies, programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.32. Features33. Module Specification4Contact Tab44. Simplified Mechanical Drawing with Keying Positions45. Pinouts5A256. Pin Description6Input6Input67. Command Truth Table78. Block Diagram8Size: 486 KBPages: 8Language: EnglishOpen manual