User ManualTable of ContentsChapter 1 Introduction61.1 Block Diagram6Figure 1.1 Internal Block Diagram61.1.1 Overview61.1.2 USB Hub71.1.3 Ethernet Controller71.1.4 EEPROM Controller71.1.5 Peripherals71.1.6 Power Management7Chapter 2 Pin Description and Configuration9Figure 2.1 LAN9512 64-QFN Pin Assignments (TOP VIEW)9Table 2.1 EEPROM Pins10Table 2.2 JTAG Pins10Table 2.3 Miscellaneous Pins10Table 2.4 USB Pins12Table 2.5 Ethernet PHY Pins13Table 2.6 I/O Power Pins, Core Power Pins, and Ground Pad14Table 2.7 No-Connect Pins14Table 2.8 64-QFN Package Pin Assignments152.1 Port Power Control162.1.1 Port Power Control Using a USB Power Switch16Figure 2.2 Port Power Control with USB Power Switch162.1.2 Port Power Control Using a Poly Fuse17Figure 2.3 Port Power Control with Poly Fuse17Figure 2.4 Port Power with Ganged Control with Poly Fuse182.2 Buffer Types19Table 2.9 Buffer Types19Chapter 3 EEPROM Controller (EPC)203.1 EEPROM Format20Table 3.1 EEPROM Format20Table 3.2 Configuration Flags Description223.1.1 Hub Configuration23Table 3.3 Hub Configuration23Table 3.4 Config Data Byte 1 Register (CFG1) Format28Table 3.5 Config Data Byte 2 Register (CFG2) Format29Table 3.6 Config Data Byte 3 Register (CFG3) Format30Table 3.7 Boost_Up Register (BOOSTUP) Format30Table 3.8 Boost_3:2 Register (BOOST32) Format30Table 3.9 Status/Command Register (STCD) Format313.2 EEPROM Defaults32Table 3.10 EEPROM Defaults323.3 EEPROM Auto-Load323.4 An Example of EEPROM Format Interpretation33Table 3.11 Dump of EEPROM Memory33Table 3.12 EEPROM Example - 256 Byte EEPROM34Chapter 4 Operational Characteristics384.1 Absolute Maximum Ratings*384.2 Operating Conditions**384.3 Power Consumption394.3.1 Operational Current Consumption & Power Dissipation39Table 4.1 Operational Current Consumption & Power Dissipation (VDD33IO = VDD33A = 3.3V)394.4 DC Specifications40Table 4.2 I/O Buffer Characteristics40Table 4.3 100BASE-TX Transceiver Characteristics41Table 4.4 10BASE-T Transceiver Characteristics414.5 AC Specifications424.5.1 Equivalent Test Load42Figure 4.1 Output Equivalent Test Load424.5.2 Reset Timing424.5.3 EEPROM Timing43Figure 4.1 EEPROM Timing43Table 4.5 EEPROM Timing Values434.6 Clock Circuit44Table 4.6 LAN9512 Crystal Specifications44Chapter 5 Package Outline455.1 64-QFN Package45Figure 5.1 LAN9512 64-QFN Package Definition45Table 5.1 LAN9512 64-QFN Dimensions45Figure 5.2 LAN9512 Recommended PCB Land Pattern46Size: 761 KBPages: 46Language: EnglishOpen manual
User ManualTable of ContentsChapter 1 Introduction61.1 Block Diagram6Figure 1.1 Internal Block Diagram61.1.1 Overview61.1.2 USB Hub71.1.3 Ethernet Controller71.1.4 EEPROM Controller71.1.5 Peripherals71.1.6 Power Management7Chapter 2 Pin Description and Configuration9Figure 2.1 LAN9512 64-QFN Pin Assignments (TOP VIEW)9Table 2.1 EEPROM Pins10Table 2.2 JTAG Pins10Table 2.3 Miscellaneous Pins10Table 2.4 USB Pins12Table 2.5 Ethernet PHY Pins13Table 2.6 I/O Power Pins, Core Power Pins, and Ground Pad14Table 2.7 No-Connect Pins14Table 2.8 64-QFN Package Pin Assignments152.1 Port Power Control162.1.1 Port Power Control Using a USB Power Switch16Figure 2.2 Port Power Control with USB Power Switch162.1.2 Port Power Control Using a Poly Fuse17Figure 2.3 Port Power Control with Poly Fuse17Figure 2.4 Port Power with Ganged Control with Poly Fuse182.2 Buffer Types19Table 2.9 Buffer Types19Chapter 3 EEPROM Controller (EPC)203.1 EEPROM Format20Table 3.1 EEPROM Format20Table 3.2 Configuration Flags Description223.1.1 Hub Configuration23Table 3.3 Hub Configuration23Table 3.4 Config Data Byte 1 Register (CFG1) Format28Table 3.5 Config Data Byte 2 Register (CFG2) Format29Table 3.6 Config Data Byte 3 Register (CFG3) Format30Table 3.7 Boost_Up Register (BOOSTUP) Format30Table 3.8 Boost_3:2 Register (BOOST32) Format30Table 3.9 Status/Command Register (STCD) Format313.2 EEPROM Defaults32Table 3.10 EEPROM Defaults323.3 EEPROM Auto-Load323.4 An Example of EEPROM Format Interpretation33Table 3.11 Dump of EEPROM Memory33Table 3.12 EEPROM Example - 256 Byte EEPROM34Chapter 4 Operational Characteristics384.1 Absolute Maximum Ratings*384.2 Operating Conditions**384.3 Power Consumption394.3.1 Operational Current Consumption & Power Dissipation39Table 4.1 Operational Current Consumption & Power Dissipation (VDD33IO = VDD33A = 3.3V)394.4 DC Specifications40Table 4.2 I/O Buffer Characteristics40Table 4.3 100BASE-TX Transceiver Characteristics41Table 4.4 10BASE-T Transceiver Characteristics414.5 AC Specifications424.5.1 Equivalent Test Load42Figure 4.1 Output Equivalent Test Load424.5.2 Reset Timing424.5.3 EEPROM Timing43Figure 4.1 EEPROM Timing43Table 4.5 EEPROM Timing Values434.6 Clock Circuit44Table 4.6 LAN9512 Crystal Specifications44Chapter 5 Package Outline455.1 64-QFN Package45Figure 5.1 LAN9512 64-QFN Package Definition45Table 5.1 LAN9512 64-QFN Dimensions45Figure 5.2 LAN9512 Recommended PCB Land Pattern46Size: 761 KBPages: 46Language: EnglishOpen manual