Renesas rl78 Manual De Usuario

 

RL78/G1A 

CHAPTER  22   SAFETY  FUNCTIONS 

The IEC60730 standard mandates checking that the oscillation frequency is correct.  

By using the CPU/peripheral hardware clock frequency (f

CLK

) and measuring the pulse width of the input signal to 

channel 5 of the timer array unit 0 (TAU0), whether the proportional relationship between the two clock frequencies is 

correct can be determined.  Note that, however, if one or both clock operations are completely stopped, the proportional 

relationship between the clocks cannot be determined. 

<R> 

 

<Clocks to be compared> 

<1> CPU/peripheral hardware clock frequency (f

CLK

): 

•  High-speed on-chip oscillator clock (f

IH

) 

•  High-speed system clock (f

MX

) 

<2> Input to channel 5 of the timer array unit  

•  Timer input to channel 5 (TI05) 
•  Low-speed on-chip oscillator clock (f

IL

: 15 kHz (typ.)) 

•  Subsystem clock (f

SUB

)

 

 

 

TI05

f

CLK

High-speed on-chip

oscillator clock (f

IH

)

High-speed system

clock (f

MX

)

Subsystem clock

(f

SUB

)

Low-speed on-chip

oscillator clock

(15 kHz (typ.))

Watchdog timer

(WDT)

<1>

<2>

f

IL

Channel 5 of timer

array unit 0

(TAU0)

Selector

Selector

 

 

If input pulse interval measurement results in an abnormal value, it can be concluded that the clock frequency is 

abnormal. 

For how to execute input pulse interval measurement, see 6.8.4  Operation as input pulse interval 

measurement. 

 

Note  Can only be selected in the products incorporating the subsystem clock. 

R01UH0305EJ0200  Rev.2.00 

 

 

784  

Jul 04, 2013