Intel W3540 AT80601000921AB Manual De Usuario
Los códigos de productos
AT80601000921AB
Thermal Specifications
86
Intel® Xeon® Processor 3500 Series Datasheet Volume 1
6.2.2.2
Clock Modulation
Clock modulation is a second method of thermal control available to the processor.
Clock modulation is performed by rapidly turning the clocks off and on at a duty cycle
that should reduce power dissipation by about 50% (typically a 30–50% duty cycle).
Clocks often will not be off for more than 32 microseconds when the TCC is active.
Cycle times are independent of processor frequency. The duty cycle for the TCC, when
activated by the Thermal Monitor, is factory configured and cannot be modified.
Clock modulation is performed by rapidly turning the clocks off and on at a duty cycle
that should reduce power dissipation by about 50% (typically a 30–50% duty cycle).
Clocks often will not be off for more than 32 microseconds when the TCC is active.
Cycle times are independent of processor frequency. The duty cycle for the TCC, when
activated by the Thermal Monitor, is factory configured and cannot be modified.
It is possible for software to initiate clock modulation with configurable duty cycles.
A small amount of hysteresis has been included to prevent rapid active/inactive
transitions of the TCC when the processor temperature is near its maximum operating
temperature. Once the temperature has dropped below the maximum operating
temperature, and the hysteresis timer has expired, the TCC goes inactive and clock
modulation ceases.
transitions of the TCC when the processor temperature is near its maximum operating
temperature. Once the temperature has dropped below the maximum operating
temperature, and the hysteresis timer has expired, the TCC goes inactive and clock
modulation ceases.
6.2.2.3
Immediate Transiton to combined TM1 and TM2
As mentioned above, when the TCC is activated the processor will sequentially step
down the ratio multipliers and VIDs in an attempt to reduce the silicon temperature. If
the temperature continues to increase and exceeds the TCC activation temperature by
approximately 5 °C before the lowest ratio/VID combination has been reached, then
the processor will immediately transition to the combined TM1/TM2 condition. The
processor will remain in this state until the temperature has dropped below the TCC
activation point. Once below the TCC activation temperature, TM1 will be discontinued
and TM2 will be exited by stepping up to the appropriate ratio/VID state.
down the ratio multipliers and VIDs in an attempt to reduce the silicon temperature. If
the temperature continues to increase and exceeds the TCC activation temperature by
approximately 5 °C before the lowest ratio/VID combination has been reached, then
the processor will immediately transition to the combined TM1/TM2 condition. The
processor will remain in this state until the temperature has dropped below the TCC
activation point. Once below the TCC activation temperature, TM1 will be discontinued
and TM2 will be exited by stepping up to the appropriate ratio/VID state.
Figure 6-3. Frequency and Voltage Ordering
Temperature
f
MAX
f
1
f
2
VIDf
MAX
VID
Frequency
VIDf
2
VIDf
1
PROCHOT#
Temperature
f
MAX
f
1
f
2
VIDf
MAX
VID
Frequency
VIDf
2
VIDf
1
PROCHOT#