Renesas SH7709S Manual De Usuario
Rev. 5.00, 09/03, page 307 of 760
10.3.6
PCMCIA Interface
In the SH7709S, setting the A5PCM bit in BCR1 to 1 makes the bus interface for physical space
area 5 an IC memory card and I/O card interface as stipulated in JEIDA version 4.2
(PCMCIA2.1). Setting the A6PCM bit to 1 makes the bus interface for physical space area 6 an IC
memory card and I/O card interface as stipulated in JEIDA version 4.2.
area 5 an IC memory card and I/O card interface as stipulated in JEIDA version 4.2
(PCMCIA2.1). Setting the A6PCM bit to 1 makes the bus interface for physical space area 6 an IC
memory card and I/O card interface as stipulated in JEIDA version 4.2.
When the PCMCIA interface is used, a bus size of 8 or 16 bits can be set by bits A5SZ1 and
A5SZ0, or A6SZ1 and A6SZ0, in BCR2.
A5SZ0, or A6SZ1 and A6SZ0, in BCR2.
Figure 10.31 shows an example of PCMCIA card connection to the SH7709S. To enable active
insertion of the PCMCIA cards (i.e. insertion or removal while system power is being supplied), a
3-state buffer must be connected between the SH7709S’s bus interface and the PCMCIA cards.
insertion of the PCMCIA cards (i.e. insertion or removal while system power is being supplied), a
3-state buffer must be connected between the SH7709S’s bus interface and the PCMCIA cards.
As operation in big-endian mode is not explicitly stipulated in the JEIDA/PCMCIA specifications,
the PCMCIA interface for the SH7709S in big-endian mode is stipulated independently.
the PCMCIA interface for the SH7709S in big-endian mode is stipulated independently.
However, the
WAIT signal is ignored in the following three cases:
•
A write to external address space in dual address mode with 16-byte DMA transfer
•
Transfer from an external device with DACK to external address space in single address mode
with 16-byte DMA transfer
with 16-byte DMA transfer
•
Cache write-back access