Philips S1D13505 Manual De Usuario

Page 10

Epson Research and Development

Vancouver Design Center

S1D13505

Interfacing to the PC Card Bus

X23A-G-005-06

Issue Date: 01/02/05

Figure 2-2: illustrates a typical memory access write cycle on the PC Card bus.

Figure 2-2: PC Card Write Cycle

A[25:0]

CE1#

OE#

WAIT#

ADDRESS VALID

DATA VALID

Hi-Z

D[15:0]

REG#

CE2#

Transfer Start

Transfer Complete

WE#