Cypress CY7C1518KV18 Manual De Usuario
CY7C1516KV18, CY7C1527KV18
CY7C1518KV18, CY7C1520KV18
CY7C1518KV18, CY7C1520KV18
Document Number: 001-00437 Rev. *E
Page 2 of 30
Logic Block Diagram (CY7C1516KV18)
Logic Block Diagram (CY7C1527KV18)
Write
Reg
Reg
Write
Reg
Reg
CLK
A
(21:0)
Gen.
K
K
Control
Logic
Address
Register
Read Add
. Decode
Read Data Reg.
R/W
Output
Logic
Reg.
Reg.
Reg.
8
16
8
NWS
[1:0]
V
REF
W
rite Add. Decode
8
22
C
C
8
LD
Control
R/W
DOFF
4M x 8 Arra
y
4M
x
x
8
A
rra
y
8
DQ
[7:0]
8
CQ
CQ
CQ
Write
Reg
Reg
Write
Reg
Reg
CLK
A
(21:0)
Gen.
K
K
Control
Logic
Address
Register
Read
A
d
d. Decode
Read Data Reg.
R/W
Output
Logic
Reg.
Reg.
Reg.
9
18
9
BWS
[0]
V
REF
W
rite Add. Decode
9
22
C
C
9
LD
Control
R/W
DOFF
4M x 9 Arr
a
y
4M x 9 A
rray
9
DQ
[8:0]
9
CQ
CQ
CQ