Cypress CY7C68014A Manual De Usuario
CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
CY7C68015A, CY7C68016A
Document #: 38-08032 Rev. *L
Page 28 of 62
50
40
TXD0
Output
H
TXD0 is the active-HIGH TXD0 output from 8051
UART0, which provides the output clock in sync mode,
and the output data in async mode.
UART0, which provides the output clock in sync mode,
and the output data in async mode.
42
CS#
Output
H
CS# is the active-LOW chip select for external memory.
41
32
WR#
Output
H
WR# is the active-LOW write strobe output for external
memory.
memory.
40
31
RD#
Output
H
RD# is the active-LOW read strobe output for external
memory.
memory.
38
OE#
Output
H
OE# is the active-LOW output enable for external
memory.
memory.
33
27
21
14
2H
Reserved
Input
N/A
Reserved. Connect to ground.
101
79
51
44
7B
WAKEUP
Input
N/A
USB Wakeup. If the 8051 is in suspend, asserting this
pin starts up the oscillator and interrupts the 8051 to
enable it to exit the suspend mode. Holding WAKEUP
asserted inhibits the EZ-USB
pin starts up the oscillator and interrupts the 8051 to
enable it to exit the suspend mode. Holding WAKEUP
asserted inhibits the EZ-USB
®
chip from suspending.
This pin has programmable polarity (WAKEUP.4).
36
29
22
15
3F
SCL
OD
Z
Clock for the I
2
C interface. Connect to VCC with a 2.2K
resistor, even if no I
2
C peripheral is attached.
37
30
23
16
3G
SDA
OD
Z
Data for I
2
C-compatible interface. Connect to VCC
with a 2.2K resistor, even if no I
2
C-compatible
peripheral is attached.
2
1
6
55
5A
VCC
Power
N/A
VCC. Connect to 3.3V power source.
26
20
18
11
1G
VCC
Power
N/A
VCC. Connect to 3.3V power source.
43
33
24
17
7E
VCC
Power
N/A
VCC. Connect to 3.3V power source.
48
38
VCC
Power
N/A
VCC. Connect to 3.3V power source.
64
49
34
27
8E
VCC
Power
N/A
VCC. Connect to 3.3V power source.
68
53
VCC
Power
N/A
VCC. Connect to 3.3V power source.
81
66
39
32
5C
VCC
Power
N/A
VCC. Connect to 3.3V power source.
100
78
50
43
5B
VCC
Power
N/A
VCC. Connect to 3.3V power source.
107
85
VCC
Power
N/A
VCC. Connect to 3.3V power source.
3
2
7
56
4B
GND
Ground
N/A
Ground.
27
21
19
12
1H
GND
Ground
N/A
Ground.
49
39
GND
Ground
N/A
Ground.
58
48
33
26
7D
GND
Ground
N/A
Ground.
65
50
35
28
8D
GND
Ground
N/A
Ground.
80
65
GND
Ground
N/A
Ground.
93
75
48
41
4C
GND
Ground
N/A
Ground.
116
94
GND
Ground
N/A
Ground.
125
99
4
53
4A
GND
Ground
N/A
Ground.
14
13
NC
N/A
N/A
No Connect. This pin must be left open.
15
14
NC
N/A
N/A
No Connect. This pin must be left open.
16
15
NC
N/A
N/A
No Connect. This pin must be left open.
Table 11. FX2LP Pin Descriptions (continued)
128
TQFP
100
TQFP
56
SSOP
56
QFN
56 VF-
BGA
Name
Type
Default
Description