Cypress CY7C68014A Manual De Usuario
CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
CY7C68015A, CY7C68016A
Document #: 38-08032 Rev. *L
Page 43 of 62
10.7 Slave FIFO Synchronous Read
Figure 18. Slave FIFO Synchronous Read Timing Diagram
IFCLK
SLRD
FLAGS
SLOE
t
SRD
t
RDH
t
OEon
t
XFD
t
XFLG
DATA
t
IFCLK
N+1
t
OEoff
N
Table 20. Slave FIFO Synchronous Read Parameters with Internally Sourced IFCLK
Parameter
Description
Min
Max
Unit
t
IFCLK
IFCLK Period
20.83
ns
t
SRD
SLRD to Clock Setup Time
18.7
ns
t
RDH
Clock to SLRD Hold Time
0
ns
t
OEon
SLOE Turn-on to FIFO Data Valid
10.5
ns
t
OEoff
SLOE Turn-off to FIFO Data Hold
10.5
ns
t
XFLG
Clock to FLAGS Output Propagation Delay
9.5
ns
t
XFD
Clock to FIFO Data Output Propagation Delay
11
ns
Table 21. Slave FIFO Synchronous Read Parameters with Externally Sourced IFCLK
Parameter
Description
Min.
Max.
Unit
t
IFCLK
IFCLK Period
20.83
200
ns
t
SRD
SLRD to Clock Setup Time
12.7
ns
t
RDH
Clock to SLRD Hold Time
3.7
ns
t
OEon
SLOE Turn-on to FIFO Data Valid
10.5
ns
t
OEoff
SLOE Turn-off to FIFO Data Hold
10.5
ns
t
XFLG
Clock to FLAGS Output Propagation Delay
13.5
ns
t
XFD
Clock to FIFO Data Output Propagation Delay
15
ns