Cypress CY8C21334 Manual De Usuario
CY8C21634, CY8C21534
CY8C21434, CY8C21334, CY8C21234
Document Number: 38-12025 Rev. *O
Page 9 of 45
20-Pin Part Pinout
Figure 4. CY8C21334 20-Pin PSoC Device
SSOP
Vdd
P0[6], A, I, M
P0[6], A, I, M
P0[4], A, I, M
P0[2], A, I, M
P0[0], A, I, M
P0[2], A, I, M
P0[0], A, I, M
XRES
P1[6], M
P1[4], EXTCLK, M
P1[2], M
P1[4], EXTCLK, M
P1[2], M
P1[0], I2C SDA, M
20
19
18
17
16
15
14
13
12
11
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
10
A, I, M, P0[7]
A, I, M, P0[5]
A, I, M, P0[3]
A, I, M, P0[1]
A, I, M, P0[3]
A, I, M, P0[1]
M, I2C SCL, P1[7]
SDA, P1[5]
M, P1[3]
SCL, P1[1]
Vss
Vss
M, I2C
M, I2C
Table 4. Pin Definitions - CY8C21334 20-Pin (SSOP)
Pin No.
Type
Name
Description
Digital
Analog
1
IO
I, M
P0[7]
Analog column mux input.
2
IO
I, M
P0[5]
Analog column mux input.
3
IO
I, M
P0[3]
Analog column mux input, integrating input.
4
IO
I, M
P0[1]
Analog column mux input, integrating input.
5
Power
Vss
Ground connection.
6
IO
M
P1[7]
I2C Serial Clock (SCL).
7
IO
M
P1[5]
I2C Serial Data (SDA).
8
IO
M
P1[3]
9
IO
M
P1[1]
I2C Serial Clock (SCL), ISSP-SCLK
.
10
Power
Vss
Ground connection.
11
IO
M
P1[0]
I2C Serial Data (SDA), ISSP-SDATA
.
12
IO
M
P1[2]
13
IO
M
P1[4]
Optional External Clock Input (EXTCLK).
14
IO
M
P1[6]
15
Input
XRES
Active high external reset with internal pull down.
16
IO
I, M
P0[0]
Analog column mux input.
17
IO
I, M
P0[2]
Analog column mux input.
18
IO
I, M
P0[4]
Analog column mux input.
19
IO
I, M
P0[6]
Analog column mux input.
20
Power
Vdd
Supply voltage.
LEGEND A = Analog, I = Input, O = Output, and M = Analog Mux Input.