Cypress CY8C20x36 Manual De Usuario
CY8C20x36/46/66, CY8C20396
Document Number: 001-12696 Rev. *D
Page 33 of 34
Document History Page
Document Title: CY8C20x36/46/66, CY8C20396 CapSense
TM
Applications
Document Number: 001-12696
Revision
ECN
Origin of Change
Submission Date
Description of Change
**
766857
HMT
See ECN
New silicon and document (Revision **).
*A
1242866
HMT
See ECN
Add features. Update all applicable sections. Update specs.
Fix 24-pin QFN pinout moving pins inside. Update package
revisions. Update and add to Emulation and Programming
Accessories table.
Fix 24-pin QFN pinout moving pins inside. Update package
revisions. Update and add to Emulation and Programming
Accessories table.
*B
2174006
AESA
See ECN
Added 48-Pin SSOP Part Pinout
Modified symbol R
Modified symbol R
VDD
to R
GND
in Table DC Analog Mux Bus
Specification
Added footnote in Table DC Analog Mux Bus Specification
Added 16K FLASH Parts. Updated Notes, Package Diagrams
and Ordering Information table. Updated Thermal Impedance
and Solder Reflow tables
Added footnote in Table DC Analog Mux Bus Specification
Added 16K FLASH Parts. Updated Notes, Package Diagrams
and Ordering Information table. Updated Thermal Impedance
and Solder Reflow tables
*C
2587518
TOF/JASM/MNU/
HMT
HMT
10/13/08
Converted from Preliminary to Final
Fixed broken links. Updated data sheet template.
Added operating voltage ranges with USB
ADC resolution changed from 10-bit to 8-bit
Included ADC specifications table
Included Comparator specification table
Included Voh7, Voh8, Voh9, Voh10 specs
Flash data retention – condition added to Note
Input leakage spec changed to 1
Fixed broken links. Updated data sheet template.
Added operating voltage ranges with USB
ADC resolution changed from 10-bit to 8-bit
Included ADC specifications table
Included Comparator specification table
Included Voh7, Voh8, Voh9, Voh10 specs
Flash data retention – condition added to Note
Input leakage spec changed to 1
μA max
GPIO rise time for ports 0,1 and ports 2,3 made common
AC Programming specifications updated
Included AC Programming cycle timing diagram
AC SPI specification updated
The VIH for 3.0<Vdd<2.4 changed to 1.6 from 2.0
Added USB specification
Added SPI CLK to P1[0]
Updated package diagrams
Updated thermal impedances for QFN packages
Updated F
AC Programming specifications updated
Included AC Programming cycle timing diagram
AC SPI specification updated
The VIH for 3.0<Vdd<2.4 changed to 1.6 from 2.0
Added USB specification
Added SPI CLK to P1[0]
Updated package diagrams
Updated thermal impedances for QFN packages
Updated F
GPIO
parameter in Table 23
Updated voltage ranges for F
SPIM
and F
SPIS
in Table 30
Update Development Tools, add Designing with PSoC
Designer. Edit, fix links, notes and table format. Update R
Designer. Edit, fix links, notes and table format. Update R
IN
formula, fix TRise parameter names in GPIO figure, fix Switch
Rate note. Update maximum data in Table 20. DC POR and
LVD Specifications.
Rate note. Update maximum data in Table 20. DC POR and
LVD Specifications.
*D
2649637
SNV/AESA
03/17/2009
Changed title to “CY8C20x36/46/66, CY8C20396
CapSense™ Applications”. Updated data sheet Features, pin
information, and ordering information sections. Updated
package diagram 001-42168 to *C.
CapSense™ Applications”. Updated data sheet Features, pin
information, and ordering information sections. Updated
package diagram 001-42168 to *C.