Cypress CY7C68015A Manual De Usuario

Document #: 38-08032 Rev. *L

Page 59 of 62

Follow these recommendations to ensure reliable high perfor-
mance operation:

■

Four layer impedance controlled boards are required to 
maintain signal quality.

■

Specify impedance targets (ask your board vendor what they 
can achieve).

■

To control impedance, maintain trace widths and trace spacing.

■

Minimize stubs to minimize reflected signals.

■

Connections between the USB connector shell and signal 
ground must be near the USB connector.

■

Bypass and flyback caps on VBus, near connector, are recom-
mended.

■

DPLUS and DMINUS trace lengths should be kept to within 2 
mm of each other in length, with preferred length of 20 to 
30 mm.

■

Maintain a solid ground plane under the DPLUS and DMINUS 
traces. Do not allow the plane to split under these traces.

■

Do not place vias on the DPLUS or DMINUS trace routing.

■

Isolate the DPLUS and DMINUS traces from all other signal 
traces by no less than 10 mm.

 (continued)

TOP VIEW

PIN A1 CORNER

0.50

3.50

5.00±0.10

BOTTOM VIEW

0.10(4X)

3.50

5.00±0.10

0.50

Ø0.15 M C A B

Ø0.05 M C

Ø0.30±0.05(56X)

A1 CORNER

-B-

-A-

1.0

m

ax

0.160

~

0.260

0.080

C

0.45

SEATING PLANE

0.21

0.10

C

-C-

SIDE VIEW

5.00±0.10

5.00±0.10

REFERENCE JEDEC: MO-195C

PACKAGE WEIGHT: 0.02 grams

E

G
H

F

D

C

B

A

1

3

2

6

5

4

8

6

7

8

5

6

2

3

4

1

E

G
H

F

D

C

B

A

001-03901-*B

24. Source for recommendations: EZ-USB FX2™PCB Design Recommendations, http://www.cypress.com/cfuploads/support/app_notes/FX2_PCB.pdf and 

High-Speed USB Platform Design Guidelines, http://www.usb.org/developers/docs/hs_usb_pdg_r1_0.pdf.