Cypress CY7C1475BV33 Manual De Usuario

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CY7C1471BV33
CY7C1473BV33, CY7C1475BV33
Document #: 001-15029 Rev. *B
Page 22 of 32
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature  ................................. –65
°C to +150°C
Ambient Temperature with
Power Applied ............................................ –55
°C to +125°C
Supply Voltage on V
DD
 Relative to GND ........–0.5V to +4.6V
Supply Voltage on V
DDQ
 Relative to GND ...... –0.5V to +V
DD
DC Voltage Applied to Outputs
in Tri-State ...........................................–0.5V to V
DDQ
 + 0.5V
DC Input Voltage ................................... –0.5V to V
DD
 + 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage...........................................  >2001V
(MIL-STD-883, Method 3015)
Latch Up Current ....................................................  >200 mA
Operating Range
Range
Ambient
Temperature
V
DD
V
DDQ
Commercial
0°C to +70°C  3.3V
 –5%/+10% 2.5V – 5%
to V
DD
Industrial
–40°C to +85°C 
Electrical Characteristics 
Over the Operating Range
Parameter
Description
Test Conditions
Min
Max
Unit
V
DD
Power Supply Voltage
3.135
3.6
V
V
DDQ
IO Supply Voltage
For 3.3V IO
3.135
V
DD
V
For 2.5V IO
2.375
2.625
V
V
OH
Output HIGH Voltage
For 3.3V IO, I
OH 
= –4.0 mA
2.4
V
For 2.5V IO, I
OH 
= –1.0 mA
2.0
V
V
OL
Output LOW Voltage
For 3.3V IO, I
OL 
= 8.0 mA
0.4
V
For 2.5V IO, I
OL 
= 1.0 mA
0.4
V
V
IH
Input HIGH Voltage
For 3.3V IO
2.0
V
DD
 + 0.3V
V
For 2.5V IO
1.7
V
DD
 + 0.3V
V
V
IL
Input LOW Voltage
For 3.3V IO
–0.3
0.8
V
For 2.5V IO
–0.3
0.7
V
I
X
Input Leakage Current 
except ZZ and MODE
GND 
≤ V
I
 
≤ V
DDQ
–5
5
μA
Input Current of MODE
Input = V
SS
–30
μA
Input = V
DD
5
μA
Input Current of ZZ
Input = V
SS
–5
μA
Input = V
DD
30
μA
I
OZ
Output Leakage Current
GND 
≤ V
I
 
≤ V
DD, 
Output Disabled
–5
5
μA
I
DD
 
V
DD
 Operating Supply 
Current
V
DD 
= Max., I
OUT 
= 0 mA,
f = f
MAX
 = 1/t
CYC
7.5 ns cycle, 133 MHz
305
mA
10 ns cycle, 117 MHz
275
mA
I
SB1
Automatic CE 
Power Down 
Current—TTL Inputs
V
DD 
= Max, Device Deselected, 
V
IN
 
≥ V
IH
 or V
IN
 
≤ V
IL
f = f
MAX
, inputs switching
7.5 ns cycle, 133 MHz
200
mA
10 ns cycle, 117 MHz
200
mA
I
SB2
Automatic CE
Power Down 
Current—CMOS Inputs
V
DD 
= Max, Device Deselected, 
V
IN
≤ 0.3V or V
IN
 > V
DD
 – 0.3V, 
f = 0, inputs static
All speeds
120
mA
I
SB3
Automatic CE 
Power Down 
Current—CMOS Inputs
V
DD 
= Max, Device Deselected, or 
V
IN
 
≤ 0.3V or V
IN
 > V
DDQ
 – 0.3V
f = f
MAX
, inputs switching
7.5 ns cycle, 133 MHz
200
mA
10 ns cycle, 117 MHz
200
mA
I
SB4
Automatic CE
Power Down 
Current—TTL Inputs
V
DD 
= Max, Device Deselected, 
V
IN
 
≥ V
DD
 – 0.3V or V
IN
 
≤ 
0.3V
,
f = 0, inputs static
All Speeds
165
mA
Notes
13. Overshoot: V
IH
(AC) < V
DD
 +1.5V (pulse width less than t
CYC
/2). Undershoot: V
IL
(AC) > –2V (pulse width less than t
CYC
/2).
14. T
Power-up
: assumes a linear ramp from 0V to V
DD
(min.) within 200 ms. During this time V
IH
 < V
DD
 and V
DDQ 
< V
DD
.
15. The operation current is calculated with 50% read cycle and 50% write cycle.