Cypress CY8CTMA120 Manual De Usuario
CY8CTST120, CY8CTMG120, CY8CTMA120
September 25, 2008
Document No. 001-49038 Rev. **
1
September 2008
Silicon Errata for CY8CTST120, CY8CTMG120, and CY8CTMA120
This document describes the errata for the TrueTouch
™ devices CY8CTST120, CY8CTMA120, and
CY8CTMG120. Details include errata trigger conditions, scope of impact, available workarounds, and silicon
revision applicability. Compare this document to the device’s data sheet for a complete functional description.
Contact your local Cypress Sales Representative if you have questions.
revision applicability. Compare this document to the device’s data sheet for a complete functional description.
Contact your local Cypress Sales Representative if you have questions.
Part Numbers Affected
Part Number
Ordering Information
CY8CTxx120
CY8CTST120-56LFXI
CY8CTST120-56LFXIT
CY8CTST120-00AXI
CY8CTMG120-56LFXI
CY8CTMG120-56LFXIT
CY8CTMG120-00AXI
CY8CTMA120-56LFXI
CY8CTMA120-56LFXIT
CY8CTMA120-00AXI
Errata Summary
The following table defines the errata applicability to available CY8CTxx120 family devices.
Items
Part Number
Silicon Revision
Fix Status
[1]. Internal Main Oscillator
(IMO) tolerance deviation at
temperature extremes
(IMO) tolerance deviation at
temperature extremes
CY8CTxx120
A
Silicon fix is planned.
[2]. The DP line of the USB
interface may pulse low when
the PSoC device wakes from
sleep, causing an unexpected
wakeup of the host computer
interface may pulse low when
the PSoC device wakes from
sleep, causing an unexpected
wakeup of the host computer
CY8CTxx120
A
Use workaround.
[3]. Invalid Flash reads may
occur if Vdd is pulled to -0.5V
just before power on
occur if Vdd is pulled to -0.5V
just before power on
CY8CTxx120
A
Use workaround.
[4]. PMA Index Register fails
to auto increment with
CPU_Clock set to SysClk/1
(24 MHz)
to auto increment with
CPU_Clock set to SysClk/1
(24 MHz)
CY8CTxx120
A
Use workaround.