Cypress CY8C24994 Manual De Usuario

Document Number: 38-12018 Rev. *M

Page 22 of 47

10.3.1  DC Chip Level Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V

and -40°C 

≤ T

A

 

≤ 85°C, or 3.0V to 3.6V and -40°C ≤ T

A

 

≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and

are for design guidance only.  

10.3.2  DC General Purpose I/O Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V

and -40°C 

≤ T

A

 

≤ 85°C, or 3.0V to 3.6V and -40°C ≤ T

A

 

≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and

are for design guidance only.  

Vdd

Supply Voltage

3.0

–

5.25

V

See DC POR and LVD specifications, 

.

I

DD5

Supply Current, IMO = 24 MHz (5V)

–

14

27

mA

Conditions are Vdd = 5.0V, T

A 

= 25 

o

C, 

CPU = 3 MHz, SYSCLK doubler 

disabled, VC1 = 1.5 MHz, VC2 = 93.75 

kHz, VC3 = 93.75 kHz, analog power = 

off.

I

DD3

Supply Current, IMO = 24 MHz (3.3V)

–

8

14

mA

Conditions are Vdd = 3.3V, T

A 

= 25 

o

C, 

CPU = 3 MHz, SYSCLK doubler 

disabled, VC1 = 1.5 MHz, VC2 = 93.75 

kHz, VC3 = 0.367 kHz, analog power = 

off.

I

SB

Sleep (Mode) Current with POR, LVD, Sleep 

Timer, and WDT.

[3]

–

3

6.5

μA

Conditions are with internal slow speed 

oscillator, Vdd = 3.3V, -40

 o

C 

≤ T

A

 

≤ 55 

o

C, analog power = off.

I

SBH

Sleep (Mode) Current with POR, LVD, Sleep 

Timer, and WDT at high temperature.

[3]

–

4

25

μA

Conditions are with internal slow speed 

oscillator, Vdd = 3.3V, 55

 o

C < T

A

 

≤ 85 

o

C, analog power = off.

R

PU

Pull-Up Resistor

4

5.6

8

k

Ω

R

PD

Pull-Down Resistor

4

5.6

8

k

Ω

V

OH

High Output Level

Vdd - 

1.0

–

–

V

I/OH = 10 mA, Vdd = 4.75 to 5.25V (8 

total loads, 4 on even port pins (for 

example, P0[2], P1[4]), 4 on odd port 

pins (for example, P0[3], P1[5])). 80 

mA maximum combined I/OH budget.

V

OL

Low Output Level

–

–

0.75

V

I/OL = 25 mA, Vdd = 4.75 to 5.25V (8 

total loads, 4 on even port pins (for 

example, P0[2], P1[4]), 4 on odd port 

pins (for example, P0[3], P1[5])). 200 

mA maximum combined I/OL budget.

V

IL

Input Low Level

–

–

0.8

V

Vdd = 3.0 to 5.25.

V

IH

Input High Level

2.1

–

V

Vdd = 3.0 to 5.25.

V

H

Input Hysterisis

–

60

–

mV

I

IL

Input Leakage (Absolute Value)

–

1

–

nA

Gross tested to 1 

μA.

C

IN

Capacitive Load on Pins as Input

–

3.5

10

pF

Package and pin dependent. 

Temp = 25

o

C.

C

OUT

Capacitive Load on Pins as Output

–

3.5

10

pF

Package and pin dependent. 

Temp = 25

o

C.

3. Standby current includes all functions (POR, LVD, WDT, Sleep Time) needed for reliable system operation. This should be compared with devices that have similar 

functions enabled.