Cypress CYD01S36V Manual De Usuario
CYD01S36V
CYD02S36V/36VA/CYD04S36V
CYD09S36V/CYD18S36V
Document Number: 38-06076 Rev. *G
Page 2 of 28
Logic Block Diagram
FTSEL
L
PORTSTD[1:0]
L
DQ [35:0]
L
BE [3:0]
L
CE0
L
CE1
L
OE
L
R/W
L
FTSEL
R
PORTSTD[1:0]
R
DQ [35:0]
R
BE [3:0]
R
CE0
R
CE1
R
OE
R
R/W
R
A [18:0]
L
CNT/MSK
L
ADS
L
CNTEN
L
CNTRST
L
RET
L
CNTINT
L
C
L
WRP
L
A [18:0]
R
CNT/MSK
R
ADS
R
CNTEN
R
CNTRST
R
RET
R
CNTINT
R
C
R
WRP
R
CONFIG Block
CONFIG Block
IO
Control
IO
Control
Dual Ported Array
Address &
Counter Logic
Address &
Counter Logic
INT
L
TRST
TMS
TDI
TDO
TCK
JTAG
MRST
READY
R
LowSPD
R
READY
L
LowSPD
L
RESET
LOGIC
LOGIC
INT
R
BUSY
L
BUSY
R
Mailboxes
Arbitration Logic
Note
1. 18-Mbit device has 19 address bits, 9-Mbit device has 18 address bits, 4-Mbit device has 17 address bits, 2-Mbit device has 16 address bits, and 1-Mbit device has
15 address bits.