Cypress CY7C64013C Manual De Usuario
CY7C64013C
CY7C64113C
Document #: 38-08001 Rev. *B
Page 9 of 51
3.0
Pin Configurations
1
2
3
4
5
6
7
9
11
12
13
14
15
16
18
17
XTALIN
10
8
19
20
31
30
29
33
32
35
34
37
36
39
38
41
40
43
42
45
44
46
48
47
21
22
23
24
25
27
26
28
V
CC
P1[1]
P1[0]
P1[2]
P1[4]
P1[6]
P3[0]
P3[2]
V
REF
P1[3]
P1[5]
P1[7]
P3[1]
D+[0]
D–[0]
P3[3]
GND
P3[5]
P3[7]
P2[1]
P2[3]
GND
P2[5]
P2[7]
DAC[7]
P0[7]
P0[5]
P0[3]
P0[1]
DAC[1]
XTALOUT
GND
P3[4]
NC
P3[6]
P2[0]
P2[2]
GND
P2[4]
P2[6]
DAC[0]
V
PP
P0[0]
P0[2]
P0[4]
P0[6]
DAC[2]
CY7C64113C
48-pin SSOP
CY7C64013C
1
2
3
4
5
6
7
9
11
12
13
14
XTALIN
10
8
15
17
16
19
18
21
20
23
22
25
24
26
28
27
V
CC
P1[1]
P1[0]
P1[2]
P3[0]
P3[2]
GND
P2[2]
V
REF
GND
P3[1]
D+[0]
D–[0]
P2[3]
P2[5]
P0[7]
P0[5]
P0[3]
P0[1]
P0[6]
XTALOUT
P2[4]
P2[6]
V
PP
P0[0]
P0[2]
P0[4]
28-pin SOIC
CY7C64013C
28-pin PDIP
TOP VIEW
1
2
3
4
5
6
7
9
11
12
13
14
XTALIN
10
8
15
17
16
19
18
21
20
23
22
25
24
26
28
27
V
CC
P1[0]
P1[2]
P3[0]
P3[2]
P2[2]
GND
P2[4]
V
REF
P1[1]
GND
P3[1]
D+[0]
D–[0]
P2[3]
P2[5]
P0[7]
P0[5]
P0[3]
P0[1]
XTALOUT
P2[6]
V
PP
P0[0]
P0[2]
P0[4]
P0[6]