Cypress CY8C21234 Manual De Usuario

Document Number: 38-12025  Rev. *O

Page 3 of 45

The Analog System consists of 4 configurable blocks that allow

the creation of complex analog signal flows. Analog peripherals

are very flexible and may be customized to support specific

application requirements. Some of the common PSoC analog

functions for this device (most available as user modules) are:

■

Analog-to-digital converters (single or dual, with 8-bit or 10-bit 

resolution)

■

Pin-to-pin comparator

■

Single-ended comparators (up to 2) with absolute (1.3V) 

reference or 8-bit DAC reference

■

1.3V reference (as a System Resource)

In most PSoC devices, analog blocks are provided in columns of

three, which includes one CT (Continuous Time) and two SC

(Switched Capacitor) blocks. The CY8C21x34 devices provide

limited functionality Type “E” analog blocks. Each column

contains one CT Type E block and one SC Type E block. Refer

to the PSoC Programmable System-on-Chip™ Technical

Reference Manual for detailed information on the CY8C21x34’s

Type E analog blocks.

The Analog Multiplexer System
The Analog Mux Bus can connect to every GPIO pin. Pins may

be connected to the bus individually or in any combination. The

bus also connects to the analog system for analysis with

comparators and analog-to-digital converters. An additional 8:1

analog input multiplexer provides a second path to bring Port 0

pins to the analog array.
Switch control logic enables selected pins to precharge

continuously under hardware control. This enables capacitive

measurement for applications such as touch sensing. Other

multiplexer applications include:

■

Track pad, finger sensing.

■

Chip-wide mux that allows analog input from any IO pin.

■

Crosspoint connection between any IO pin combinations.

AN2403

 on the Cypress web site at

System Resources, some of which are listed in the previous

sections, provide additional capability useful to complete

systems. Additional resources include a switch mode pump, low

voltage detection, and power on reset. Brief statements

describing the merits of each system resource follow.

■

Digital clock dividers provide three customizable clock 

frequencies for use in applications. The clocks may be routed 

to both the digital and analog systems. Additional clocks can 

be generated using digital PSoC blocks as clock dividers.

■

The I2C module provides 100 and 400 kHz communication over 

two wires. Slave, master, and multi-master modes are all 

supported.

■

Low Voltage Detection (LVD) interrupts can signal the 

application of falling voltage levels, while the advanced POR 

(Power On Reset) circuit eliminates the need for a system 

supervisor.

■

An internal 1.3 voltage reference provides an absolute 

reference for the analog system, including ADCs and DACs.

■

An integrated switch mode pump (SMP) generates normal 

operating voltages from a single 1.2V battery cell, providing a 

low cost boost converter.

■

Versatile analog multiplexer system.

ACE00

ACE01

ASE10

ASE11

X

X

X

X

X

ACI0[1:0]

ACI1[1:0]