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Cypress CY8C20x46 Manual De Usuario

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CY8C20x36/46/66, CY8C20396
Document Number: 001-12696  Rev. *D
Page 12 of 34
48-Pin QFN   
Table 6.  Pin Definitions - CY8C20666 PSoC Device 
Pin 
No.
Di
gi
ta
l
Analog
Name
Description
Figure 6.  CY8C20666 PSoC Device 
1
NC
No connection
2
IO
I
P2[7]
3
IO
I
P2[5]
Crystal output (XOut)
4
IO
I
P2[3]
Crystal input (XIn)
5
IO
I
P2[1]
6
IO
I
P4[3]
7
IO
I
P4[1]
8
IO
I
P3[7]
9
IO
I
P3[5]
10
IO
I
P3[3]
11
IO
I
P3[1]
12
IOHR
I
P1[7]
I2C SCL, SPI SS
13
IOHR
I
P1[5]
I2C SDA, SPI MISO
14
NC
No connection
15
NC
No connection
16
IOHR
I
P1[3]
SPI CLK
17
IOHR
I
P1[1]
ISSP CLK
, I2C SCL, SPI MOSI
18
Power
Vss
Ground connection
19
IO
D+
20
IO
D-
21
Power
Vdd
Supply voltage
22
IOHR
I
P1[0]
ISSP DATA
, I2C SDA, SPI CLK
23
IOHR
I
P1[2]
24
IOHR
I
P1[4]
Optional external clock input 
(EXTCLK)
25
IOHR
I
P1[6]
26
Input
XRES
Active high external reset with 
internal pull down
27
IO
I
P3[0]
28
IO
I
P3[2]
29
IO
I
P3[4]
Pin 
No.
Digit
a
l
Analog
Name
Description
30
IO
I
P3[6]
40
IOH
I
P0[6]
31
IO
I
P4[0]
41
Power
Vdd
Supply voltage
32
IO
I
P4[2]
42
NC
No connection
33
IO
I
P2[0]
43
NC
No connection
34
IO
I
P2[2]
44
IOH
I
P0[7]
35
IO
I
P2[4]
45
IOH
I
P0[5]
36
IO
I
P2[6]
46
IOH
I
P0[3]
Integrating input
37
IOH
I
P0[0]
47
Power
Vss
Ground connection
38
IOH
I
P0[2]
48
IOH
I
P0[1]
39
IOH
I
P0[4]
CP
Power
Vss
Center pad must be connected to ground
 LEGEND A = Analog, I = Input, O = Output, NC = No Connection H = 5 mA High Output Drive, R = Regulated Output.
QFN
(Top View)
Vs
s
P0[3
], AI
P0
[5
], AI
P0[7
], AI
Vd
d
P0
[6
],
A
I
P0[2
], AI
P0[0
], AI
10
11
12
AI , P2[7]
NC
AI, XOut, P2[5]
AI, XIn , P2[3]
AI , P2[1]
AI, P4[3]
AI, P4[1]
AI, P3[7]
AI, P3[5]
AI, P3[3]
AI, P3[1]
 AI, I2C SCL, SPI SS, P1[7]
35
34
33
32
31
30
29
28
27
26
25
36
48
47
46
45
44
43
42
41
40
39
38
37
P2[4], AI
P2[2], AI
P2[0], AI
P4[2], AI
P4[0], AI
P3[6], AI
P3[4], AI
P3[2], AI
P3[0], AI
XRES
P1[6], AI
P2[6], AI
1
2
3
4
5
6
7
8
9
13
14
15
16
17
18
19
20
21
22
23
24
I2C
 SD
A, 
SPI MISO,
 A
I,
P1[5
]
NC
SP
I C
LK
, A
I,
P1[
3]
AI, C
LK
6
, I2
C 
SC
L,
 SPI MO
SI
, P1
[1]
Vs
s
D+
D-
Vdd
AI
, D
AT
A
1
, I
2C
 SDA, 
SP
I CLK, P1[0
]
AI
, P
1[
2]
AI,
 EXTC
LK, 
P
1[
4]
NC
NC
NC
P0[4
], AI
P0
[1
], AI