Cypress CY8C20x46 Manual De Usuario

Document Number: 001-12696  Rev. *D

Page 9 of 34

3. The center pad (CP) on the QFN package must be connected to ground (Vss) for best mechanical, thermal, and electrical performance. If not connected to ground, it 

must be electrically floated and not connected to any other signal.

1

IO

I

P2[5]

Crystal output (XOut)

2

IO

I

P2[3]

Crystal input (XIn)

3

IO

I

P2[1]

4

IOHR

I

P1[7]

I2C SCL, SPI SS

5

IOHR

I

P1[5]

I2C SDA, SPI MISO

6

IOHR

I

P1[3]

SPI CLK

7

IOHR

I

P1[1]

ISSP CLK

, I2C SCL, SPI 

MOSI

8

NC

No connection

9

Power

Vss

Ground connection

10

IOHR

I

P1[0]

ISSP DATA

, I2C SDA, SPI 

CLK

11

IOHR

I

P1[2]

12

IOHR

I

P1[4]

Optional external clock input 
(EXTCLK)

13

IOHR

I

P1[6]

14

Input

XRES

Active high external reset with 
internal pull down

15

IO

I

P2[0]

16

IOH

I

P0[0]

17

IOH

I

P0[2]

18

IOH

I

P0[4]

19

IOH

I

P0[6]

20

Power

Vdd

Supply voltage

21

IOH

I

P0[7]

22

IOH

I

P0[5]

23

IOH

I

P0[3]

Integrating input

24

IOH

I

P0[1]

Integrating input

CP

Power

Vss

Center pad must be connected 
to ground

 
LEGEND A = Analog, I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output.

AI

, DA

T

A

2

, I2

C

  

SD

A

, SPI 

C

L

K

, P1[

0

]

AI, I2C SCL, SPI SS, P1[7]

AI, I2C SDA, SPI MISO, P1[5]

AI, SPI CLK, P1[3]

1

2

3

4

5

6

18

17

16

15

14

13

P0[2], AI
P0[0], AI

24

23

22

21

20

19

P0[3

], A

I

P0[5

], A

I

P0[7

],  

AI

Vd

d

P0[4], AI

7

8

9

10

11

12

S

P

I M

O

SI,

 P1

[1]

A

I, P

1

[2

]

AI, P2[1]

NC

P1[6], AI

A

I, E

X

T

C

LK

, 

P

1

[4

]

XRES

P2[0], AI

P

0

[6],

 AI

AI, CL

K

2

, I

2

C 

SCL

P

0

[1],

 AI

 

Vss

AI, XOut, P2[5]

AI, XIn, P2[3]