Cypress CY7C1156V18 Manual De Usuario
CY7C1141V18, CY7C1156V18
CY7C1143V18, CY7C1145V18
CY7C1143V18, CY7C1145V18
Document Number: 001-06583 Rev. *D
Page 22 of 28
Capacitance
Tested initially and after any design or process change that may affect these parameters.
Parameter
Description
Test Conditions
Max
Unit
C
IN
Input
Capacitance
T
A
= 25
°C, f = 1 MHz,
V
DD
= 1.8V
V
DDQ
= 1.5V
5
pF
C
CLK
Clock Input Capacitance
6
pF
C
O
Output Capacitance
7
pF
Thermal Resistance
Tested initially and after any design or process change that may affect these parameters.
Parameter
Description
Test Conditions
165 FBGA
Package
Unit
Θ
JA
Thermal Resistance
(junction to ambient)
(junction to ambient)
Test conditions follow standard test methods and
procedures for measuring thermal impedance, in
accordance with EIA/JESD51.
procedures for measuring thermal impedance, in
accordance with EIA/JESD51.
13.48
°C/W
Θ
JC
Thermal Resistance
(junction to case)
(junction to case)
4.15
°C/W
AC Test Loads and Waveforms
Figure 6. AC Test Loads and Waveforms
1.25V
0.25V
R = 50
Ω
5 pF
INCLUDING
JIG AND
SCOPE
ALL INPUT PULSES
Device
R
L
= 50
Ω
Z
0
= 50
Ω
V
REF
= 0.75V
V
REF
= 0.75V
0.75V
Under
Test
Test
0.75V
Device
Under
Test
Under
Test
OUTPUT
0.75V
V
REF
V
REF
OUTPUT
ZQ
ZQ
(a)
Slew Rate = 2 V/ns
RQ =
250
250
Ω
(b)
RQ =
250
250
Ω
Notes
22. Unless otherwise noted, test conditions are based on signal transition time of 2V/ns, timing reference levels of 0.75V, Vref = 0.75V, RQ = 250
Ω, V
DDQ
= 1.5V, input
pulse levels of 0.25V to 1.25V, and output loading of the specified I
OL
/I
OH
and load capacitance shown in (a) of AC Test Loads.