Cypress nvSRAM Manual De Usuario

2 Mbit (256K x 8/128K x 16) nvSRAM

•

198 Champion Court

•

San Jose

,

CA 95134-1709

•

408-943-2600

Document #: 001-45754 Rev. *B

 Revised November 10, 2008

■

20 ns, 25 ns, and 45 ns Access Times

■

Internally organized as 256K x 8 (CY14B102L) or 128K x 16 

(CY14B102N)

■

Hands off Automatic STORE on power down with only a small 

Capacitor

■

STORE to QuantumTrap

®

 nonvolatile elements initiated by 

software, device pin, or AutoStore

®

 on power down

■

RECALL to SRAM initiated by software or power up

■

Infinite Read, Write, and Recall Cycles

■

200,000 STORE cycles to QuantumTrap

■

20 year data retention 

■

Single 3V +20

% to -10% operation

■

Commercial, Industrial and Automotive Temperatures

■

48-ball FBGA and 44/54-pin TSOP - II packages

■

Pb-free and RoHS compliance

The Cypress CY14B102L/CY14B102N is a fast static RAM, with

a nonvolatile element in each memory cell. The memory is

organized as 256K bytes of 8 bits each or 128K words of 16 bits

each. The embedded nonvolatile elements incorporate

QuantumTrap  technology, producing the world’s most reliable

nonvolatile memory. The SRAM provides infinite read and write

cycles, while independent nonvolatile data resides in the highly

reliable QuantumTrap cell. Data transfers from the SRAM to the

nonvolatile elements (the STORE operation) takes place

automatically at power down. On power up, data is restored to

the SRAM (the RECALL operation) from the nonvolatile memory.

Both the STORE and RECALL operations are also available

under software control.

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1. Address A

0

 - A

17

 for x8 configuration and Address A

0

 - A

16

 for x16 configuration.

2. Data DQ

0

 - DQ

7

 for x8 configuration and Data DQ

0

 - DQ

15

 for x16 configuration.

3. BHE and BLE are applicable for x16 configuration only.