Cypress CY8C24123 Manual De Usuario
CY8C24123
CY8C24223, CY8C24423
Document Number: 38-12011 Rev. *G
Page 8 of 43
Pinouts
The CY8C24x23 PSoC device is available in a variety of packages which are listed and illustrated in the following tables. Every port
pin (labeled with a “P”) is capable of Digital IO. However, Vss, Vdd, SMP, and XRES are not capable of Digital IO.
pin (labeled with a “P”) is capable of Digital IO. However, Vss, Vdd, SMP, and XRES are not capable of Digital IO.
8-Pin Part Pinout
20-Pin Part Pinout
Table 3. 8-Pin Part Pinout (PDIP, SOIC)
Pin
No.
No.
Type
Pin
Name
Description
Figure 6. CY8C24123 8-Pin PSoC Device
Digital Analog
1
IO
IO
P0[5]
Analog column mux input and column output
2
IO
IO
P0[3]
Analog column mux input and column output
3
IO
P1[1]
Crystal Input (XTALin), I2C Serial Clock (SCL)
4
Power
Vss
Ground connection
5
IO
P1[0]
Crystal Output (XTALout), I2C Serial Data (SDA)
6
IO
I
P0[2]
Analog column mux input
7
IO
I
P0[4]
Analog column mux input
8
Power
Vdd
Supply voltage
LEGEND: A = Analog, I = Input, and O = Output.
Table 4. 20-Pin Part Pinout (PDIP, SSOP, SOIC)
Pin
No.
No.
Type
Pin
Name
Description
Figure 7. CY8C24223 20-Pin PSoC Device
Digital Analog
1
IO
I
P0[7]
Analog column mux input
2
IO
IO
P0[5]
Analog column mux input and column output
3
IO
IO
P0[3]
Analog column mux input and column output
4
IO
I
P0[1]
Analog column mux input
5
Power
SMP
Switch Mode Pump (SMP) connection to external
components required
components required
6
IO
P1[7]
I2C Serial Clock (SCL
7
IO
P1[5]
I2C Serial Data (SDA)
8
IO
P1[3]
9
IO
P1[1]
Crystal Input (XTALin), I2C Serial Clock (SCL)
10
Power
Vss
Ground connection
11
IO
P1[0]
Crystal Output (XTALout), I2C Serial Data (SDA)
12
IO
P1[2]
13
IO
P1[4]
Optional External Clock Input (EXTCLK)
14
IO
P1[6]
15
Input
XRES Active high external reset with internal pull down
16
IO
I
P0[0]
Analog column mux input
17
IO
I
P0[2]
Analog column mux input
18
IO
I
P0[4]
Analog column mux input
19
IO
I
P0[6]
Analog column mux input
20
Power
Vdd
Supply voltage
LEGEND: A = Analog, I = Input, and O = Output.
PDIP
SOIC
1
2
3
4
2
3
4
8
7
6
5
7
6
5
Vdd
P0[4], AI
P0[2], AI
P1[0], XTALout, I2C SDA
P0[4], AI
P0[2], AI
P1[0], XTALout, I2C SDA
AIO, P0[5]
AIO, P0[3]
AIO, P0[3]
I2C SCL, XTALin, P1[1]
Vss
AI, P0[7]
AIO, P0[5]
AIO, P0[3]
AIO, P0[3]
AI, P0[1]
SMP
I2C SCL, P1[7]
I2C SDA, P1[5]
P1[3]
I2C SCL, XTALin, P1[1]
Vss
PDIP
SSOP
SOIC
20
19
18
17
16
15
14
13
12
11
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
2
3
4
5
6
7
8
9
10
Vdd
P0[6], AI
P0[4], AI
P0[2], AI
P0[0], AI
XRES
P1[6]
P1[4], EXTCLK
P1[2]
P1[0], XTALout, I2C SDA
P0[6], AI
P0[4], AI
P0[2], AI
P0[0], AI
XRES
P1[6]
P1[4], EXTCLK
P1[2]
P1[0], XTALout, I2C SDA