Cypress CY7C0833AV Manual De Usuario
CY7C0837AV, CY7C0830AV
CY7C0831AV, CY7C0832AV
CY7C0831AV, CY7C0832AV
CY7C0832BV, CY7C0833AV
Document #: 38-06059 Rev. *S
Page 2 of 28
Logic Block Diagram
[2]
A
0L
–A
18L
CLK
L
ADS
L
CNTEN
L
CNTRST
L
True
RAM Array
19
Addr.
Read
Back
Read
Back
CNTINT
L
Mask Register
Counter/
Address
Register
Register
CNT/MSK
L
Address
Decode
Dual-Ported
Interrupt
Logic
INT
L
Reset
Logic
JTAG
TDO
TMS
TCK
TDI
MRST
DQ
9L
–DQ
17L
DQ
0L
–DQ
8L
I/O
Control
9
9
CE
0L
CE
1L
R/W
L
B0
L
B1
L
OE
L
A
0R
–A
18R
CLK
R
ADS
CNTEN
CNTRST
R
19
Addr.
Read
Back
Read
Back
CNTINT
R
Mask Register
Counter/
Address
Register
Register
CNT/MSK
R
Address
Decode
Interrupt
Logic
INT
R
I/O
Control
9
9
CE
0R
CE
1R
R/W
R
B0
R
B1
R
OE
R
Mirror Reg
Mirror Reg
DQ
0R
–DQ
8R
DQ
9R
–DQ
17R
Note
2. CY7C0837AV has 15 address bits, CY7C0830AV has 16 address bits, CY7C0831AV has 17 address bits, CY7C0832AV/CY7C0832BV has 18 address bits and
CY7C0833AV has 19 address bits.