Cypress CY7C0830AV Manual De Usuario
CY7C0837AV, CY7C0830AV
CY7C0831AV, CY7C0832AV
CY7C0831AV, CY7C0832AV
CY7C0832BV, CY7C0833AV
Document #: 38-06059 Rev. *S
Page 9 of 28
Figure 3. Counter, Mask, and Mirror Logic Block Diagram
[1]
From
Mask
Register
Mask
Register
Mirror
Counter
Address
Decode
RAM
Array
Wrap
1
0
Increment
Logic
1
0
+1
+2
1
0
Wrap
Detect
From
Mask
Mask
From
Counter
Counter
To
Counter
Counter
Bit 0
Wrap
17
17
17
17
17
1
0
Load/Increment
CNT/MSK
CNTEN
ADS
CNTRST
CLK
Decode
Logic
Logic
Bidirectional
Address
Lines
Address
Lines
Mask
Register
Register
Counter/
Address
Register
Address
Register
From
Address
Lines
Address
Lines
To Readback
and Address
Decode
and Address
Decode
17
17
MRST