Intel 87C196CB Manual De Usuario
2-5
ARCHITECTURAL OVERVIEW
Figure 2-4. Effect of Clock Mode on CLKOUT Frequency
Table 2-3. Relationships Between Input Frequency, Clock Multiplier, and State Times
F
XTAL
1
(Frequency
on XTAL1)
PLLEN
Multiplier
f
(Input Frequency to
the Divide-by-two Circuit)
t
(Clock
Period)
State Time
4 MHz
0
1
4 MHz
250 ns
500 ns
5 MHz
0
1
5 MHz
200 ns
400 ns
8 MHz
0
1
8 MHz
125 ns
250 ns
12 MHz
0
1
12 MHz
83.5 ns
167 ns
16 MHz
0
1
16 MHz
62.5 ns
125 ns
20 MHz
0
1
20 MHz
50 ns
100 ns
4 MHz
1
4
16 MHz
62.5 ns
125 ns
5 MHz
1
4
20 MHz
50 ns
100 ns
CLKOUT
t = 80ns
t = 20ns
CLKOUT
XTAL1 (5 MHz)
f
f
A3170-01
T
XHCH
T
XHCH
XTAL1 (5 MHz)
PLLEN = 0
PLLEN = 1