Intel 87C196CB Manual De Usuario

4-1

The interrupt structure of the 87C196CB is the same as that of the 8XC196NT. The only differ-
ence is that INT13, which was reserved on the 8XC196NT, supports the CAN peripheral. 

Table 4-1 lists the 87C196CB’s interrupts sources, default priorities (30 is highest and 0 is low-
est), and vector addresses. Figures 4-1 and 4-2 illustrate the interrupt mask and pending registers.

Nonmaskable Interrupt

NMI

INT15

FF203EH

30

—

—

—

EXTINT Pin

EXTINT

INT14

FF203CH

14

PTS14

FF205CH

29

CAN

CAN

INT13

FF203AH

13

PTS13 

†

FF205AH

28

SIO Receive

RI

INT12

FF2038H

12

PTS12

FF2058H

27

SIO Transmit

TI

INT11

FF2036H

11

PTS11

FF2056H

26

SSIO Channel 1 Transfer

SSIO1

INT10

FF2034H

10

PTS10

FF2054H

25

SSIO Channel 0 Transfer

SSIO0

INT09

FF2032H

09

PTS09

FF2052H

24

Slave Port Command Buff Full

CBF

INT08

FF2030H

08

PTS08

FF2050H

23

Unimplemented Opcode

—

—

FF2012H

—

—

—

—

Software TRAP Instruction

—

—

FF2010H

—

—

—

—

Slave Port Input Buff Full

IBF

INT07

FF200EH

07

PTS07

FF204EH

22

Slave Port Output Buff Empty

OBE

INT06

FF200CH

06

PTS06

FF204CH

21

A/D Conversion Complete

AD_DONE

INT05

FF200AH

05

PTS05

FF204AH

20

EPA Capture/Compare 0

EPA0

INT04

FF2008H

04

PTS04

FF2048H

19

EPA Capture/Compare 1

EPA1

INT03

FF2006H

03

PTS03

FF2046H

18

EPA Capture/Compare 2

EPA2

INT02

FF2004H

02

PTS02

FF2044H

17

EPA Capture/Compare 3

EPA3

INT01

FF2002H

01

PTS01

FF2042H

16

EPA Capture/Compare 4–9, 
EPA 0–9 Overrun,
EPA Compare 0–1, 
Timer 1 Overflow,
Timer 2 Overflow

EPA

x 

INT00

FF2000H

00

PTS00

†

FF2040H

15

†

 PTS service is not recommended because the PTS cannot determine the source of shared interrupts.