Intel 87C196CB Manual De Usuario
5-1
CHAPTER 5
I/O PORTS
5.1
PORT 0 AND EPORT
The I/O ports of the 87C196CB are functionally identically to those of the 8XC196NT. However,
the 87C196CB implements all eight pins of port 0, and the 100-pin 87C196CB also implements
all eight pins of the EPORT. The associated registers have been modified to include bits corre-
sponding to the upper nibble of the ports. Table 5-1 provides an overview of the 8XC196CB’s
I/O ports. Figure 5-1 illustrates the port 0 pin state register, and Figures 5-2 through 5-5 illustrate
the EPORT registers.
the 87C196CB implements all eight pins of port 0, and the 100-pin 87C196CB also implements
all eight pins of the EPORT. The associated registers have been modified to include bits corre-
sponding to the upper nibble of the ports. Table 5-1 provides an overview of the 8XC196CB’s
I/O ports. Figure 5-1 illustrates the port 0 pin state register, and Figures 5-2 through 5-5 illustrate
the EPORT registers.
Table 5-1. 87C196CB Input/Output Ports
Port
Bits
Type
Direction
Associated Peripheral(s)
Port 0
8
Standard
Input-only
A/D converter
Port 1
8
Standard
Bidirectional
EPA and timers
Port 2
8
Standard
Bidirectional
SIO, interrupts, bus control, clock gen.
Port 3
8
Memory-mapped
Bidirectional
Address/data bus
Port 4
8
Memory-mapped
Bidirectional
Address/data bus
Port 5
8
Memory-mapped
Bidirectional
Bus control, slave port
Port 6
8
Standard
Bidirectional
EPA, SSIO
EPORT
4 (84-pin CB)
8 (100-pin CB)
8 (100-pin CB)
Memory mapped
Bidirectional
Extended address lines
P0_PIN
Address:
Reset State:
1FDAH
XXH
Each bit of the port 0 pin input (P0_PIN) register reflects the current state of the corresponding pin,
regardless of the pin configuration.
regardless of the pin configuration.
7
0
PIN7
PIN6
PIN5
PIN4
PIN3
PIN2
PIN1
PIN0
Bit
Number
Bit
Mnemonic
Function
7:0
PIN7:0
Port 0 Pin
x
Input Value
This bit contains the current state of P0.
x
.
Figure 5-1. Port
x Pin Input (Px_PIN) Register