Renesas REJ06B0734-0100 Manual De Usuario
SH7263/SH7203 Group
Data Transfer to On-chip Peripheral Modules with DMAC
REJ06B0734-0100/Rev.1.00
April 2008
Page 2 of 17
1. Introduction
1.1 Specification
•
DMAC channel 1 is used to transfer data from external memory to the transmit FIFO data register (SCFTDR) in the
serial communication interface with FIFO (SCIF channel 0) in order to transmit character string data.
serial communication interface with FIFO (SCIF channel 0) in order to transmit character string data.
•
SCIF transmit FIFO data empty transfer requests (on-chip peripheral module request) are used to request DMA
transfer.
transfer.
1.2 Modules
Used
•
Direct memory access controller (DMAC channel 1)
•
Serial communication interface with FIFO (SCIF channel 0)
1.3 Applicable
Conditions
•
Microcontroller: SH7263/SH7203
•
Operating Frequency:
Internal clock
200 MHz
Bus clock
66.67 MHz
Peripheral clock
33.33 MHz
•
C Compiler:
SuperH RISC engine family C/C
++
compiler package Ver.9.01, from Renesas
Technology
•
Compile Option:
-cpu = sh2afpu -fpu = single -include = "$(WORKSPDIR)\inc"
-object = "$(CONFIGDIR)\$(FILELEAF).obj" -debug -gbr = auto -chgincpath
-errorpath -global_volatile = 0 -opt_range = all -infinite_loop = 0 -del_vacant_loop = 0
-struct_alloc = 1 -nologo
1.4 Related
Application
Notes
•
The operation of the reference program for this document was confirmed with the setting conditions described in
the application note: SH7263/SH7203 Initialization Example. Please refer to the application note in combination
with this one.
the application note: SH7263/SH7203 Initialization Example. Please refer to the application note in combination
with this one.
•
Details on SCIF UART transmission are described in the application: SH7263/SH7203 Example Settings for UART
Transmission by the SCIF.
Transmission by the SCIF.
Please refer to the above application notes in combination with this one.