Renesas 16-bit single-chip microcomputer Manual De Usuario
Rev.1.02 Jul 01, 2005 page 202 of 314
REJ09B0126-0102
REJ09B0126-0102
M16C/6N Group (M16C/6NL, M16C/6NN)
18. CAN Module
Under development
This document is under development and its contents are subject to change.
Figure 18.4 Bit Mapping of Mask Registers in Byte Access
18.3 Acceptance Mask Registers
Figures 18.4 and 18.5 show the C0GMR register, the C0LMAR register, and the C0LMBR register, in which
bit mapping in byte access and word access are shown.
Figure 18.5 Bit Mapping of Mask Registers in Word Access
NOTES:
1.
is undefined.
2. These registers can be written in CAN reset/initialization mode of the CAN module.
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
SID2
SID1
SID0
EID17
EID16
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
SID2
SID1
SID0
EID17
EID16
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
SID2
SID1
SID0
EID17
EID16
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
C0GMR register
C0LMAR register
C0LMBR register
0160h
0161h
0162h
0163h
0164h
0166h
0167h
0168h
0169h
016Ah
016Ch
016Dh
016Eh
016Fh
0170h
Addresses
CAN0
b7
b0
SID10 SID9 SID8 SID7 SID6
SID5 SID4 SID3 SID2 SID1 SID0
EID17 EID16 EID15 EID14 EID13 EID12 EID11 EID10 EID9 EID8 EID7 EID6
EID5 EID4 EID3 EID2 EID1 EID0
SID10 SID9 SID8 SID7 SID6
SID5 SID4 SID3 SID2 SID1 SID0
EID17 EID16 EID15 EID14 EID13 EID12 EID11 EID10 EID9 EID8 EID7 EID6
EID5 EID4 EID3 EID2 EID1 EID0
SID10 SID9 SID8 SID7 SID6
SID5 SID4 SID3 SID2 SID1 SID0
EID17 EID16 EID15 EID14 EID13 EID12 EID11 EID10 EID9 EID8 EID7 EID6
EID5 EID4 EID3 EID2 EID1 EID0
C0GMR register
C0LMAR register
C0LMBR register
0160h
0162h
0164h
0166h
0168h
016Ah
016Ch
016Eh
0170h
Addresses
CAN0
b15
b0
b8 b7
NOTES:
1.
is undefined.
2. These registers can be written in CAN reset/initialization mode of the CAN module.