Renesas 16-bit single-chip microcomputer Manual De Usuario

Rev.1.02    Jul 01, 2005    page 31 of 314
REJ09B0126-0102

M16C/6N Group (M16C/6NL, M16C/6NN)

7. Clock Generating Circuit

This document is under development and its contents are subject to change.

Four circuits are incorporated to generate the system clock signal:

• Main clock oscillation circuit

• Sub clock oscillation circuit

• On-chip oscillator

• PLL frequency synthesizer

Table 7.1 lists the clock generating circuit specifications. Figure 7.1 shows the clock generating circuit.

Figures 7.2 to 7.8 show the clock-related registers.

Item

Main Clock

Oscillation Circuit

Sub Clock

Oscillation Circuit

On-chip Oscillator

PLL Frequency

Synthesizer

Use of Clock

Clock

Frequency

Usable

Oscillator

Pins to Connect

Oscillator

Oscillation Stop
and Re-Oscillation
Detection Function

Oscillation Status
After Reset

Other

• CPU clock source

• Peripheral function

clock source

0 to 16 MHz

•Ceramic oscillator

•Crystal oscillator

XIN, XOUT

Available

Oscillating

Externally derived clock can be input

• CPU clock source

• Clock source of Timer

A, B

32.768 kHz

•Crystal oscillator

XCIN, XCOUT

Available

Stopped

• CPU clock source
• Peripheral function

clock source

• CPU and peripheral

function clock sources
when the main clock
stops oscillating

About 1 MHz

-

-

Available

Stopped

-

• CPU clock source

• Peripheral function

clock source

16 MHz, 20 MHz,

24 MHz

-

-

Available

Stopped

-