Renesas 16-bit single-chip microcomputer Manual De Usuario
Rev.1.02 Jul 01, 2005 page 70 of 314
REJ09B0126-0102
REJ09B0126-0102
M16C/6N Group (M16C/6NL, M16C/6NN)
9. Interrupt
Under development
This document is under development and its contents are subject to change.
Figure 9.11 IFSR0 Register
NOTES:
1.When the PCLK6 bit in the PCLKR register = 0, A/D conversion and key input share the vector and
interrupt control register. When using the A/D conversion interrupt, set the IFSR01 bit to "0" (A/D
conversion). When using the key input interrupt, set the IFSR01 bit to "1" (key input).
conversion). When using the key input interrupt, set the IFSR01 bit to "1" (key input).
2. Timer B5 and SI/O5 share the vector and interrupt control register. When using the timer B5 interrupt,
set the IFSR04 bit to "0" (Timer B5). When using SI/O5 interrupt, set the IFSR04 bit to "1" (SI/O5).
The SI/O5 interrupt is only in the 128-pin version. In the 100-pin version, set the IFSR04 bit to "0"
(Timer B5).
The SI/O5 interrupt is only in the 128-pin version. In the 100-pin version, set the IFSR04 bit to "0"
(Timer B5).
3. Timer B0 and SI/O6 share the vector and interrupt control register. When using the timer B0 interrupt,
set the IFSR05 bit to "0" (Timer B0). When using SI/O6 interrupt, set the IFSR05 bit to "1" (SI/O6).
The SI/O6 interrupt is only in the 128-pin version. In the 100-pin version, set the IFSR05 bit to "0"
(Timer B0).
The SI/O6 interrupt is only in the 128-pin version. In the 100-pin version, set the IFSR05 bit to "0"
(Timer B0).
4. Timer B3 and UART0 bus collision detection share the vector and interrupt control register.
When using the timer B3 interrupt, set the IFSR06 bit to "0" (Tmer B3).
When using UART0 bus collision detection, set the IFSR06 bit to "1" (UART0 bus collision detection).
When using UART0 bus collision detection, set the IFSR06 bit to "1" (UART0 bus collision detection).
5. Timer B4 and UART1 bus collision detection share the vector and interrupt control register.
When using the timer B4 interrupt, set the IFSR07 bit to "0" (Timer B4).
When using UART1 bus collision detection, set the IFSR07 bit to "1" (UART1 bus collision detection).
When using UART1 bus collision detection, set the IFSR07 bit to "1" (UART1 bus collision detection).
0 : CAN0 wake-up or error
1 : Do not set a value
1 : Do not set a value
0 : Timer B3
1 : UART0 bus collision detection
1 : UART0 bus collision detection
0 : Timer B4
1 : UART1 bus collision detection
1 : UART1 bus collision detection
IFSR00
IFSR01
Interrupt Request Cause
Select Bit
Select Bit
Interrupt Request Cause
Select Bit
Select Bit
(1)
IFSR02
Interrupt Request Cause
Select Bit
Select Bit
IFSR04
0 : Timer B0
1 : SI/O6
1 : SI/O6
IFSR05
Interrupt Request Cause
Select Bit
Select Bit
(3)
0 : Do not set a value
1 : SI/O4
1 : SI/O4
Interrupt Request Cause
Select Bit
Select Bit
IFSR03
IFSR06
IFSR07
Interrupt Request Cause Select Register 0
Bit Symbol
b7
b6
b5
b4
b3
b2
b1
b0
Symbol
Address
After Reset
IFSR0
01DEh
00h
Interrupt Request Cause
Select Bit
Select Bit
(4)
Interrupt Request Cause
Select Bit
Select Bit
(5)
Function
0 : Do not set a value
1 : SI/O3
1 : SI/O3
0 : A/D conversion
1 : Key input
1 : Key input
0 : Timer B5
1 : SI/O5
1 : SI/O5
Interrupt Request Cause
Select Bit
Select Bit
(2)
RW
RW
RW
RW
RW
RW
RW
RW
RW
Bit Name
0
1
1