Fujitsu FR81S Manual De Usuario
CHAPTER 34: CLOCK SUPERVISOR
4. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : CLOCK SUPERVISOR
FUJITSU SEMICONDUCTOR CONFIDENTIAL
14
4.5. Stop Mode
This section explains stop mode of the clock supervisor.
CR Oscillator
The oscillation stops when oscillation permission bit (CSVCR:RCE) at the stop mode is set to "0" by
changing to the stop mode.
After the stop mode is made clear, it is permitted automatically again.
Main Clock Supervisor
When the main clock supervisor function is enabled, it automatically stops when stop mode is entered.
The main clock supervisor enable bit (CSVCR:MSVE) does not change to "0".
After stop mode is released, the supervisor is automatically re-enabled after waiting for the main oscillation
stabilization wait time.
[Notes]
Because the main oscillation stabilization wait time is measured by the main clock itself, if the main clock
stops before the oscillation stabilization wait time has elapsed, the main oscillation stabilization wait time
does not end and the main clock supervisor is not enabled.
In this case, after the timeout time measured by the internal CR oscillator has elapsed, the main supervisor
function is enabled regardless of the oscillation stabilization wait time and the main clock stop is detected.
Note:
When the main clock supervisor function is disabled, if stop mode is entered, the supervisor remains
disabled even after recovering from stop mode.
Sub Clock Supervisor
When the sub clock supervisor function is enabled, it automatically stops when stop mode is entered.
The sub clock supervisor enable bit (CSVCR:SSVE) does not change to "0".
After stop mode is released, the supervisor is automatically re-enabled after waiting for the main oscillation
stabilization wait time.
Note:
When the sub clock supervisor function is disabled, if stop mode is entered, the supervisor remains disabled
even after recovering from stop mode.
MB91520 Series
MN705-00010-1v0-E
1187