Fujitsu FR81S Manual De Usuario
CHAPTER 19: BASE TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BASE TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
77
Figure 5-21 Example of Counting Operation If Reactivation Is Not Enabled
Figure 5-22 Example of Counting Operation If Reactivation Is Enabled
PPG output
waveform
Rising edge detection
Acti
v
ation t
r
igger is ignored
T
r
igger
m
n
0
Trigger interrupt
request (TGIR bit)
Underflow interrupt
request (UDIR bit)
: Value of base timer x L width setting reload register (BTxPRLL)
: Value of base timer x H width setting reload register (BTxPRLH)
: Count clock cycle
=
T(m+1) ms
=
T(n+1) ms
m
n
0
Interrupt request
(1)
(2)
(1)
(2)
PPG output
waveform
Rising edge detection
Reactivate with activation trigger
Trigger
m
n
0
Trigger interrupt
request (TGIR bit)
Underflow interrupt request
(UDIR bit)
Trigger interrupt
request (TGIR bit)
Interrupt request
: Value of base timer x L width setting reload register (BTxPRLL)
: Value of base timer x H width setting reload register (BTxPRLH)
: Count clock cycle
= T(m+1) ms
= T(n+1)
m
n
0
(1)
(2)
(1)
(2)
(2)
MB91520 Series
MN705-00010-1v0-E
710