Fujitsu FR81S Manual De Usuario
CHAPTER 7: RESET
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER :
RESET
FUJITSU SEMICONDUCTOR CONFIDENTIAL
8
4.1. Reset Source Register : RSTRR (ReSeT Result
Register)
The bit configuration of the reset source register is shown.
This register displays various reset factors generated until just before.
Note:
When this register is read out, all bits will be cleared.
This register is not cleared in reading in the debugging state.
Because each reset factor is masked in the debugging state, this register does not detect the reset factor
either.
RSTRR : Address 0480
H
(Access : Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
IRRST
ERST
WDG1
WDG0
Reserved
SCRT
SRST
Initial value
*
*
*
*
-
-
*
*
Attribute R,WX
R,WX
R,WX
R,WX
RX,WX
RX,WX
R,WX
R,WX
* Due to a reset factor.
[bit7] IRRST (IRregular ReSeT) : Irregular reset
This bit indicates that any of power-on reset, internal low-voltage detection, reset timeout, or simultaneous
assert of RSTX and NMIX external pins has occurred, so that the bus access state when issuing a reset cannot
be guaranteed. When this bit is "0" after the reset, no bus access was executed at the previous reset, which
guarantees that memory contents have not been destroyed by the reset. When this bit is "1" after the reset, it is
possible that a bus access was executed at the previous reset, which does not guarantee that memory contents
have not been destroyed by the reset.
IRRST
Irregular reset detected
0
Irregular reset undetected
1
Irregular reset detected
This bit will be cleared when it is read out.
[bit6] ERST (External ReSeT) : Reset pin input, illegal standby mode transition detection, external
low-voltage detection, clock supervisor reset, simultaneous assert of RSTX and NMIX external
pins
This bit indicates that there was a reset input from RSTX pin input, illegal standby mode transition detection
reset, external low-voltage detection, clock supervisor reset or simultaneous assert of RSTX and NMIX
external pins.
In case of a reset time out due to this reset factor, IRRST along with this bit will be "1".
MB91520 Series
MN705-00010-1v0-E
261