Renesas M16C Manual De Usuario

Descargar
Página de 340
Rev.1.10    Jul 01, 2005    page 84 of 318
REJ09B0124-0110
M16C/6N Group (M16C/6NK, M16C/6NM)
11. DMAC
Under development
This document is under development and its contents are subject to change.
Figure 11.2  DM0SL Register
DMA0 Request Cause Select Register
Symbol
Address
After Reset
DM0SL
03B8h
00h
DSEL0
DSEL1
DSEL2
DSEL3
DSR
DMS
-
(b5-b4)
Function
Bit Symbol
Bit Name
DMA Request Cause
Select Bit
Nothing is assigned.  When write, set to "0".
When read, their contents are "0". 
Software DMA 
Request Bit
A DMA request is generated by setting 
this bit to "1" when the DMS bit is "0" 
(basic cause) and the DSEL3 to DSEL0 
bits are "0001b" (software trigger).
The value of this bit when read is "0". 
DMA Request Cause
Expansion Select Bit
0 : Basic cause of request
1 : Extended cause of request
See NOTE 1
RW
RW
RW
RW
-
RW
RW
RW
NOTE:
1. The causes of DMA0 requests can be selected by a combination of the DMS bit and the DSEL3 to DSEL0 bits
in the manner described below.
DSEL3 to DSEL0 Bits
DMS = 0 (basic cause of request)
DMS = 1 (extended cause of request)
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
Falling edge of INT0 pin
— 
Software trigger
— 
Timer A0
Timer A1 
Timer A2 
Timer A3 
Timer A4
Two edges of INT0 pin   
Timer B0
Timer B3
Timer B1
Timer B4
Timer B2
Timer B5
UART0 transmit
— 
UART0 receive 
UART2 transmit
— 
UART2 receive 
A/D conversion 
UART1 transmit 
b7
b6
b5
b4
b3
b2
b1
b0