Cypress CY7C602xx Manual De Usuario
CY7C601xx, CY7C602xx
Document 38-16016 Rev. *E
Page 67 of 68
24. Document History Page
Document Title: CY7C601xx, CY7C602xx enCoRe
™ II Low Voltage Microcontroller
Document Number: 38-16016
Rev.
ECN
Orig. of
Change
Submission
Date
Description of Change
**
327601
BON
See ECN
New data sheet
*A
400134
BHA
See ECN
Updated Power consumption values
Corrected Pin Assignment Table for 24 QSOP, 24 PDIP and 28 SSOP
packages
Minor text changes for clarification purposes
Corrected INT_MSK0 and INT_MSK1 register address
Corrected register bit definitions
Corrected Protection Mode Settings in Table 10-7
Updated LVD Trip Point values
Added Block diagrams for Timer functional timing
Replaced TBD’s with actual values
Added SPI Block Diagram
Added Timing Block Diagrams
Removed CY7C60123 DIE from Figure 5-1
Removed CY7C60123-WXC from Section 22.0 Ordering Information
Updated internal 24 MHz oscillator accuracy information
Added information on sending/receiving data when using 32 KHz oscillator
Corrected Pin Assignment Table for 24 QSOP, 24 PDIP and 28 SSOP
packages
Minor text changes for clarification purposes
Corrected INT_MSK0 and INT_MSK1 register address
Corrected register bit definitions
Corrected Protection Mode Settings in Table 10-7
Updated LVD Trip Point values
Added Block diagrams for Timer functional timing
Replaced TBD’s with actual values
Added SPI Block Diagram
Added Timing Block Diagrams
Removed CY7C60123 DIE from Figure 5-1
Removed CY7C60123-WXC from Section 22.0 Ordering Information
Updated internal 24 MHz oscillator accuracy information
Added information on sending/receiving data when using 32 KHz oscillator
*B
505222
TYJ
See ECN
Minor text changes
GPIO capacitance and timing diagram included
Method to clear Capture Interrupt Status bit discussed
Sleep and Wakeup sequence documented
PIT Timer registers’ R/W capability corrected to read only
Modified Free Running Counter text in section 17.1.1
GPIO capacitance and timing diagram included
Method to clear Capture Interrupt Status bit discussed
Sleep and Wakeup sequence documented
PIT Timer registers’ R/W capability corrected to read only
Modified Free Running Counter text in section 17.1.1
*C
524104
KKVTMP
See ECN
Change title from Wireless enCoRe II to enCoRe II Low Voltage
*D
1821746
VGT/FSU/AES
A
See ECN
Changed “High current drive” on GPIO pins to “2 mA source current on all GPIO
pins”.
Changed the storage temperature from -40C to 90C in “Absolute Maximum
ratings” section.
Added the line “The GPIOs interrupts are edge-triggered.” in Tables 19-2 and
19-6.
Made timing changes in Table 43.
Added Figure 12-1 (SROM Table) and text after it. Also modified Table 12-1
based on Figure 12-1 (SROM Table).
Changed “CAPx” to “TIOx” in Tables 18-8 and 18-9.
Changed “Capturex” to “TIOx” in Figure 18-3.
pins”.
Changed the storage temperature from -40C to 90C in “Absolute Maximum
ratings” section.
Added the line “The GPIOs interrupts are edge-triggered.” in Tables 19-2 and
19-6.
Made timing changes in Table 43.
Added Figure 12-1 (SROM Table) and text after it. Also modified Table 12-1
based on Figure 12-1 (SROM Table).
Changed “CAPx” to “TIOx” in Tables 18-8 and 18-9.
Changed “Capturex” to “TIOx” in Figure 18-3.
*E
2620679
CMCC/PYRS
12/12/08
Added Package Handling information
Formatted code in Clocking section, Removed reference to external crystal
oscillator in Tables 12-2 and 12-4
Formatted code in Clocking section, Removed reference to external crystal
oscillator in Tables 12-2 and 12-4