Renesas HD64F2111B Manual De Usuario

Rev. 1.00, 05/04, page 63 of 544 

 

Interrupts are controlled by the interrupt controller. The sources to start interrupt exception 
handling are external interrupt sources (NMI, IRQ7 to IRQ0, KIN15 to KIN0, and WUE7 to 
WUE0) and internal interrupt sources from the on-chip peripheral modules. NMI is an interrupt 
with the highest priority. For details, refer to section 5, Interrupt Controller. 

Interrupt exception handling is conducted as follows: 

1.  The values in the program counter (PC) and condition code register (CCR) are saved to the 

stack. 

2.  A vector address corresponding to the interrupt source is generated, the start address is loaded 

from the vector table to the PC, and program execution begins from that address. 

 

Trap instruction exception handling starts when a TRAPA instruction is executed. Trap instruction 
exception handling can be executed at all times in the program execution state. 

Trap instruction exception handling is conducted as follows: 

1.  The values in the program counter (PC) and condition code register (CCR) are saved to the 

stack. 

2.  A vector address corresponding to the interrupt source is generated, the start address is loaded 

from the vector table to the PC, and program execution starts from that address. 

 

The TRAPA instruction fetches a start address from a vector table entry corresponding to a vector 
number from 0 to 3, as specified in the instruction code. 

Table 4.3 shows the status of CCR after execution of trap instruction exception handling. 

0 1 

— 

1 1 

1 

[Legend] 

1: 

Set to 1 

—: 

Retains value prior to execution