Renesas SH7641 Manual De Usuario

Section 18   Multi-Function Timer Pulse Unit (MTU) 

Rev. 4.00  Sep. 14, 2005  Page 578 of 982 

REJ09B0023-0400 

 

Example of PWM Mode Setting Procedure: Figure 18.20 shows an example of the PWM mode 
setting procedure. 

PWM mode

Select counter clock

Select counter clearing

source

Select waveform

output level

Set TGR

Set PWM mode

Start count

<PWM mode>

[1]

[2]

[3]

[4]

[5]

[6]

[1]  Select the counter clock with bits TPSC2 to TPSC0 

in TCR.  At the same time, select the input clock 
edge with bits CKEG1 and CKEG0 in TCR.

[2]  Use bits CCLR2 to CCLR0 in TCR to select the 

TGR to be used as the TCNT clearing source.

[3]  Use TIOR to designate the TGR as an output 

compare register, and select the initial value and 
output value.

[4]  Set the cycle in the TGR selected in [2], and set the 

duty in the other TGR.

[5]  Select the PWM mode with bits MD3 to MD0 in 

TMDR.

[6]  Set the CST bit in TSTR to 1 to start the count 

operation.

 

Examples of PWM Mode Operation: Figure 18.21 shows an example of PWM mode 1 
operation. 

In this example, TGRA compare match is set as the TCNT clearing source, 0 is set for the TGRA 
initial output value and output value, and 1 is set as the TGRB output value. 

In this case, the value set in TGRA is used as the period, and the values set in the TGRB registers 
are used as the duty cycle. 

TCNT value

TGRA

H'0000

TIOCA

Time

TGRB

Counter cleared by
TGRA compare match