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HP (Hewlett-Packard) PCI-9111DG/HR Manual De Usuario

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Introduction 
•
 3 
Unipolar: 0~10V 
Bipolar: -10V~+10V 
•
  Converter:  DAC7541 or equivalent, monolithic multiplying  
•
  Settling Time: 30 
µ  sec 
•
  Linearity: 
± 1/2 bit LSB 
•
  Output driving capability: 
± 5mA max. 
♦  Digital I/O (DIO) 
•
  Numbers of Channel: 16 TTL compatible inputs and outputs 
•
  Input Voltage:  
Low: Min. 0V; Max. 0.8V 
High: Min. +2.0V; Max. 5.5V    
•
  Input Load:  
Low: +0.8V @ -0.2mA max. 
High: +2.7V @ +20mA max. 
•
  Output Voltage:  
Low: Min. 0V; Max. 0.4V 
High: Min. +2.4V; Max. 5.5V  
•
  Driving Capacity:  
Low: Max. +0.5V at 8.0mA (Sink) 
High: Min. 2.7V at 0.4mA (Source) 
♦  Extended Digital I/O (EDIO) 
•
  Channel: 4 inputs and outputs 
•
  Input Voltage:  
Low: +0.8V @ -10
µ A max. 
High: +3.5V @ +10
µ A max. 
•
  Input Load:  
Low: Min. 0V; Max. 0.4V 
High: Min. +24V; Max. 5.5V 
•
  Output Driving Capability:  
Low: Max. +0.4V @ 8.0mA (Sink) 
High: Min. 2.4V @ 4.0mA (Source) 
♦   Programmable Counter 
•
  Device: 8254 
•
  A/D pacer: 32-bit timer 
 
(Two 16-bit counters cascaded together) with a 2MHz time 
base 
•
  Pacer Output: 0.00046 Hz ~ 100 KHz 
•
  Pre-trigger Counter:  
One 16-bit counter for counting AD Conversion Pulse 
♦   General Specifications 
•
  Connector: 37-pin D-type connector