IBM 150 Manual De Usuario
Hardware Overview
35
2.3.5 The X-Bus
The X-Bus is an 8-bit ISA subset bus used to attach several common
subsystems to the PCI-based RS/6000 servers. The following components
are attached to this bus:
subsystems to the PCI-based RS/6000 servers. The following components
are attached to this bus:
• The Keyboard/Mouse controller
• Real-Time Clock and Non-volatile RAM
The functions of Real-Time Clock (RTC) and Non-volatile RAM (NVRAM)
are integrated into a single component in the PCI-based RS/6000 servers.
This component also supplies the logic required to perform the function of
powering the system on at a designated time. The component is operated
from a lithium battery on the board so that all time-keeping functions
continue to work while system power is turned off.
are integrated into a single component in the PCI-based RS/6000 servers.
This component also supplies the logic required to perform the function of
powering the system on at a designated time. The component is operated
from a lithium battery on the board so that all time-keeping functions
continue to work while system power is turned off.
• Mini-Support Processor (I
2
C Controller)
The Mini-Support Processor is a minicontroller that is imbedded into the
I/O planar of the PCI-based RS/6000 servers. It allows the PowerPC
processor access to VPD, operator panels and other I
I/O planar of the PCI-based RS/6000 servers. It allows the PowerPC
processor access to VPD, operator panels and other I
2
C bus-attached
devices.
2.4 The Processor Subsystem
Since its inception, the RS/6000 product line has used a number of different
processor designs, the original implementation being the POWER
architecture. The most recent development, however, is the POWER3
processor that is implemented in the RS/6000 43P 7043 Model 260. The
Model 150 uses the PowerPC 604e chip.
processor designs, the original implementation being the POWER
architecture. The most recent development, however, is the POWER3
processor that is implemented in the RS/6000 43P 7043 Model 260. The
Model 150 uses the PowerPC 604e chip.
2.4.1 The POWER3 Microprocessor
The POWER3 microprocessor introduces a new generation of 64-bit
processors especially designed for high performance and visual computing
applications. POWER3 processors will replace the POWER2 and the
POWER2 Super Chips (P2SC) in high-end RS/6000 workstations and
technical servers.The RS/6000 43P 7043 Model 260 workstation features the
POWER3 microprocessor.
processors especially designed for high performance and visual computing
applications. POWER3 processors will replace the POWER2 and the
POWER2 Super Chips (P2SC) in high-end RS/6000 workstations and
technical servers.The RS/6000 43P 7043 Model 260 workstation features the
POWER3 microprocessor.
2.4.1.1 Processor Overview
The POWER3 implementation of the PowerPC architecture provides
significant enhancements compared to the POWER2 architecture. The SMP
capable POWER3 design allows for concurrent operation of fixed-point
instructions, load/store instructions, branch instructions, and floating-point
instructions. Compared to the P2SC, which reaches its design limits at a
The POWER3 implementation of the PowerPC architecture provides
significant enhancements compared to the POWER2 architecture. The SMP
capable POWER3 design allows for concurrent operation of fixed-point
instructions, load/store instructions, branch instructions, and floating-point
instructions. Compared to the P2SC, which reaches its design limits at a