Cypress CY62158E Manual De Usuario
CY62158E MoBL
®
Document #: 38-05684 Rev. *D
Page 3 of 10
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
device. These user guidelines are not tested.
Storage Temperature .................................. –65°C to +150°C
Ambient Temperature with
Power Applied ............................................ –55°C to +125°C
Power Applied ............................................ –55°C to +125°C
Supply Voltage to Ground Potential –0.5V to V
CC(max)
+ 0.5V
DC Voltage Applied to Outputs
in High-Z State
in High-Z State
........................–0.5V to V
CC(max)
+ 0.5V
DC Input Voltage
.....................–0.5V to V
CC(max)
+ 0.5V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage............................................ >2001V
(MIL-STD-883, Method 3015)
(MIL-STD-883, Method 3015)
Latch up Current...................................................... >200 mA
Operating Range
Device
Range
Ambient
Temperature
V
CC
CY62158ELL
Industrial
–40°C to +85°C 4.5V – 5.5V
Electrical Characteristics
Over the Operating Range
Parameter
Description
Test Conditions
-45
Unit
Min
Typ
Max
V
OH
Output HIGH Voltage
I
OH
= –1 mA
2.4
V
V
OL
Output LOW Voltage
I
OL
= 2.1 mA
0.4
V
V
IH
Input HIGH Voltage
V
CC
= 4.5V to 5.5V
2.2
V
CC
+ 0.5V
V
V
IIL
Input LOW Voltage
V
CC
= 4.5V to 5.5V
–0.5
0.8
V
I
IX
Input Leakage Current
GND < V
I
< V
CC
–1
+1
μA
I
OZ
Output Leakage Current
GND < V
O
< V
CC
, Output Disabled
–1
+1
μA
I
CC
V
CC
Operating Supply
Current
f = f
MAX
= 1/t
RC
V
CC
= V
CCmax
I
OUT
= 0 mA
CMOS levels
18
25
mA
f = 1 MHz
1.8
3
mA
I
SB1
Automatic CE Power down
Current — CMOS Inputs
Current — CMOS Inputs
CE
1
> V
CC
− 0.2V, CE
2
< 0.2V
V
IN
> V
CC
– 0.2V, V
IN
< 0.2V)
f = f
MAX
(Address and Data Only),
f = 0 (OE, and WE), V
CC
= V
CCmax
2
8
μA
I
SB2
Automatic CE Power-down
Current — CMOS Inputs
Current — CMOS Inputs
CE
1
> V
CC
– 0.2V or CE
2
< 0.2V,
V
IN
> V
CC
– 0.2V or V
IN
< 0.2V,
f = 0, V
CC
= V
CCmax
2
8
μA
Capacitance
Tested initially and after any design or process changes that may affect these parameters.
Parameter
Description
Test Conditions
Max
Unit
C
IN
Input Capacitance
T
A
= 25°C, f = 1 MHz,
V
CC
= V
CC(typ)
10
pF
C
OUT
Output Capacitance
10
pF
Thermal Resistance
Tested initially and after any design or process changes that may affect these parameters.
Parameter
Description
Test Conditions
TSOP II
Unit
Θ
JA
Thermal Resistance
(Junction to Ambient)
(Junction to Ambient)
Still Air, soldered on a 3 × 4.5 inch,
two-layer printed circuit board
two-layer printed circuit board
75.13
°C/W
Θ
JC
Thermal Resistance
(Junction to Case)
(Junction to Case)
8.95
°C/W
Notes
3. V
IL
(min) = –2.0V for pulse durations less than 20 ns.
4. V
IH
(max) = V
CC
+ 0.75V for pulse durations less than 20 ns.
5. Full Device AC operation assumes a 100
μs ramp time from 0 to V
CC
(min) and 200
μs wait time after V
CC
stabilization.
6. Only chip enables (CE
1
and CE
2
), must be tied to CMOS levels to meet the I
SB2
/ I
CCDR
spec. Other inputs can be left floating.