Cypress CY7C68016A Manual De Usuario
CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
CY7C68015A, CY7C68016A
Document #: 38-08032 Rev. *L
Page 44 of 62
10.8 Slave FIFO Asynchronous Read
Figure 19. Slave FIFO Asynchronous Read Timing Diagram
SLRD
FLAGS
t
RDpwl
t
RDpwh
SLOE
t
XFLG
t
XFD
DATA
t
OEon
t
OEoff
N+1
N
Table 22. Slave FIFO Asynchronous Read Parameters
Parameter
Description
Min
Max
Unit
t
RDpwl
SLRD Pulse Width LOW
50
ns
t
RDpwh
SLRD Pulse Width HIGH
50
ns
t
XFLG
SLRD to FLAGS Output Propagation Delay
70
ns
t
XFD
SLRD to FIFO Data Output Propagation Delay
15
ns
t
OEon
SLOE Turn-on to FIFO Data Valid
10.5
ns
t
OEoff
SLOE Turn-off to FIFO Data Hold
10.5
ns
Note
23. Slave FIFO asynchronous parameter values use internal IFCLK setting at 48 MHz.