Renesas R5S72625 Manual De Usuario

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Section 16   Renesas Serial Peripheral Interface 
 
 
Page 788 of 2108 
 
R01UH0134EJ0400  Rev. 4.00 
 
 Sep 
24, 
2014 
SH7262 Group, SH7264 Group
Bit Bit 
Name 
Initial 
Value R/W Description 
2 MODF 
0 R/(W)* Mode Fault Error Flag 
Indicates the occurrence of a mode fault error. If the 
MODFEN bit is set to 1 when this module is in slave 
mode and the SSL pin is negated before the RSPCK 
cycle necessary for data transfer ends, this module 
detects a mode fault error. The active level of the 
SSL signal is determined by the SSL0P bit in the 
slave select polarity register (SSLP). 
[Clearing conditions] 
  SPSR is read when the MODF bit is 1, and then 
0 is written to the MODF bit.  
  Power-on reset 
0: No mode fault error occurred 
1: A mode fault error occurred 
Note: This bit is valid only in SPI slave mode.  
 0 R 
Reserved 
The write value should always be 0. Otherwise, 
operation cannot be guaranteed. 
0 OVRF 
0 R/(W)* Overrun Error Flag 
Indicates the occurrence of an overrun error. If a 
serial transfer ends when there is not enough space 
for receiving the specified length of data in the 
receive buffer (SPRX), this module detects an 
overrun error, and sets the OVRF bit to 1. 
[Clearing conditions] 
  SPSR is read when the OVRF bit is 1, and then 0 
is written to the OVRF bit.  
  Power-on reset 
0: No overrun error occurred 
1: An overrun error occurred 
Note: This bit is valid only in SPI slave mode. 
Note:  *  Only 0 can be written to clear the flag after reading 1.