Renesas R5S72623 Manual De Usuario

 
Section 21   IEBus

TM

 Controller 

Page 1096 of 2108 

 

R01UH0134EJ0400  Rev. 4.00 

 

 Sep 

24, 

2014 

SH7262 Group, SH7264 Group

The data field contents are specified by the control bits. 

H'0 

0 

0 

0 

0 

Reads slave status (SSR) 

H'1 

0 0 0 1 Undefined. 

 

H'2 

0 0 1 0 Undefined. 

 

H'3 

0 0 1 1 Reads 

data 

and 

locks 

H'4 

0 

1 

0 

0 

Reads locked address (lower 8 bits) 

H'5 

0 

1 

0 

1 

Reads locked address (upper 4 bits) 

H'6 

0 

1 

1 

0 

Reads slave status (SSR) and unlocks 

H'7 

0 1 1 1 Reads 

data 

H'8 

1 0 0 0 Undefined. 

H'9 

1 0 0 1 Undefined. 

H'A 

1 

0 

1 

0 

Writes command and locks 

H'B 

1 

0 

1 

1 

Writes data and locks 

H'C 

1 1 0 0 Undefined. 

H'D 

1 1 0 1 Undefined. 

H'E 

1 1 1 0 Writes 

command 

H'F 

1 1 1 1 Writes 

data 

Notes:  1.  Depending on the value of bit 3 (MSB), the transfer directions of the message length 

bits in the following message length field and data in the data field vary. 

When bit 3 is 1: Data is transferred from the master unit to the slave unit. 

When bit 3 is 0: Data is transferred from the slave unit to the master unit. 

 

2.  H'3, H'6, H'A, and H'B are control bits to specify lock setting and cancellation. 

When the undefined values of H'1, H'2, H'8, H'9, H'C, and H'D are transmitted, the 

acknowledge signal is not returned. 

 

When the control bits received from another unit which locked are not included in table 21.5, the 
slave unit which has been locked by the master unit does not accept the control bits and does not 
return the acknowledge bit.