Renesas R5S72623 Manual De Usuario

 

Section 3   Floating-Point Unit (FPU) 

 

R01UH0134EJ0400  Rev. 4.00  

 

Page 103 of 2108 

Sep 24, 2014 

 

 

 
SH7262 Group, SH7264 Group 

17 to 12 

Cause 

H'00 

R/W 

FPU Exception Cause Field 

FPU Exception Enable Field 

FPU Exception Flag Field 

Each time floating-point operation instruction is 
executed, the FPU exception cause field is cleared to 0 
first. When an FPU exception on floating-point 
operation occurs, the bits corresponding to the FPU 
exception cause field and FPU exception flag field are 
set to 1. The FPU exception flag field remains set to 1 
until it is cleared to 0 by software. 

As the bits corresponding to FPU exception enable 
filed are sets to 1, FPU exception processing occurs. 

For bit allocations of each field, see table 3.3. 

11 to 7 

Enable 

H'00 

R/W 

6 to 2 

Flag 

H'00 

R/W 

1 

0 

RM1 

RM0 

0 

1 

R/W 

R/W 

Rounding Mode 

These bits select the rounding mode. 

00: Round to Nearest 

01: Round to Zero 

10: Reserved 

11: Reserved 

 

Cause FPU 

exception 

cause field 

Bit 17 

Bit 16 

Bit 15 

Bit 14 

Bit 13 

Bit 12 

Enable FPU 

exception 

enable field 

None 

Bit 11 

Bit 10 

Bit 9 

Bit 8 

Bit 7 

Flag 

FPU exception flag 
field 

None 

Bit 6 

Bit 5 

Bit 4 

Bit 3 

Bit 2 

Note:  No FPU error occurs in the SH2A-FPU.