Renesas R5S72623 Manual De Usuario
Section 34 User Debugging Interface
R01UH0134EJ0400 Rev. 4.00
Page 1823 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
34.3.3
Enable Register (SDENR)
SDENR is a 4-bit register and initialized by
TRST assertion or in the TAP test-logic-reset state.
This register cannot be accessed by the CPU. After the emulation enable command is entered, the
serial input from TDI is transferred to SDIR.
serial input from TDI is transferred to SDIR.
Bit Bit
Name
Initial
Value
Value
R/W
Description
3 to 0
EE[3:0]
0100
Emulation
Enable
The serial input from TDI is transferred to SDENR.
For commands, see table 34.4.
Table 34.4 Emulation Enable Command
Bits 3 to 0
Description
TI3 TI2 TI1 TI0
0 0 1 1 Emulation
enable
command
0
1
0
0
Emulation is disabled (initial value)
1 1 1 1 BYPASS
Other than the above
Reserved